Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Enter and leave sleep state on chips with 6xx-style HID0
0004  * power management bits, which don't leave sleep state via reset.
0005  *
0006  * Author: Scott Wood <scottwood@freescale.com>
0007  *
0008  * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
0009  */
0010 
0011 #include <asm/ppc_asm.h>
0012 #include <asm/reg.h>
0013 #include <asm/thread_info.h>
0014 #include <asm/asm-offsets.h>
0015 
0016 _GLOBAL(mpc6xx_enter_standby)
0017     mflr    r4
0018 
0019     mfspr   r5, SPRN_HID0
0020     rlwinm  r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
0021     oris    r5, r5, HID0_SLEEP@h
0022     mtspr   SPRN_HID0, r5
0023     isync
0024 
0025     lis r5, ret_from_standby@h
0026     ori r5, r5, ret_from_standby@l
0027     mtlr    r5
0028 
0029     lwz r6, TI_LOCAL_FLAGS(r2)
0030     ori r6, r6, _TLF_SLEEPING
0031     stw r6, TI_LOCAL_FLAGS(r2)
0032 
0033     mfmsr   r5
0034     ori r5, r5, MSR_EE
0035     oris    r5, r5, MSR_POW@h
0036     sync
0037     mtmsr   r5
0038     isync
0039 
0040 1:  b   1b
0041 
0042 ret_from_standby:
0043     mfspr   r5, SPRN_HID0
0044     rlwinm  r5, r5, 0, ~HID0_SLEEP
0045     mtspr   SPRN_HID0, r5
0046 
0047     mtlr    r4
0048     blr