0001
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0007 #include <linux/crash_dump.h>
0008 #include <linux/device.h>
0009 #include <linux/irq.h>
0010 #include <linux/irqdomain.h>
0011 #include <linux/msi.h>
0012
0013 #include <asm/rtas.h>
0014 #include <asm/hw_irq.h>
0015 #include <asm/ppc-pci.h>
0016 #include <asm/machdep.h>
0017 #include <asm/xive.h>
0018
0019 #include "pseries.h"
0020
0021 static int query_token, change_token;
0022
0023 #define RTAS_QUERY_FN 0
0024 #define RTAS_CHANGE_FN 1
0025 #define RTAS_RESET_FN 2
0026 #define RTAS_CHANGE_MSI_FN 3
0027 #define RTAS_CHANGE_MSIX_FN 4
0028 #define RTAS_CHANGE_32MSI_FN 5
0029
0030
0031
0032 static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
0033 {
0034 u32 addr, seq_num, rtas_ret[3];
0035 unsigned long buid;
0036 int rc;
0037
0038 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
0039 buid = pdn->phb->buid;
0040
0041 seq_num = 1;
0042 do {
0043 if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN ||
0044 func == RTAS_CHANGE_32MSI_FN)
0045 rc = rtas_call(change_token, 6, 4, rtas_ret, addr,
0046 BUID_HI(buid), BUID_LO(buid),
0047 func, num_irqs, seq_num);
0048 else
0049 rc = rtas_call(change_token, 6, 3, rtas_ret, addr,
0050 BUID_HI(buid), BUID_LO(buid),
0051 func, num_irqs, seq_num);
0052
0053 seq_num = rtas_ret[1];
0054 } while (rtas_busy_delay(rc));
0055
0056
0057
0058
0059
0060 if (rc == 0)
0061 rc = rtas_ret[0];
0062 else if (rc > 0)
0063 rc = -rc;
0064
0065 pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
0066 func, num_irqs, rtas_ret[0], rc);
0067
0068 return rc;
0069 }
0070
0071 static void rtas_disable_msi(struct pci_dev *pdev)
0072 {
0073 struct pci_dn *pdn;
0074
0075 pdn = pci_get_pdn(pdev);
0076 if (!pdn)
0077 return;
0078
0079
0080
0081
0082 if (rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, 0) != 0) {
0083
0084
0085
0086
0087 if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) {
0088 pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
0089 }
0090 }
0091 }
0092
0093 static int rtas_query_irq_number(struct pci_dn *pdn, int offset)
0094 {
0095 u32 addr, rtas_ret[2];
0096 unsigned long buid;
0097 int rc;
0098
0099 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
0100 buid = pdn->phb->buid;
0101
0102 do {
0103 rc = rtas_call(query_token, 4, 3, rtas_ret, addr,
0104 BUID_HI(buid), BUID_LO(buid), offset);
0105 } while (rtas_busy_delay(rc));
0106
0107 if (rc) {
0108 pr_debug("rtas_msi: error (%d) querying source number\n", rc);
0109 return rc;
0110 }
0111
0112 return rtas_ret[0];
0113 }
0114
0115 static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
0116 {
0117 struct device_node *dn;
0118 const __be32 *p;
0119 u32 req_msi;
0120
0121 dn = pci_device_to_OF_node(pdev);
0122
0123 p = of_get_property(dn, prop_name, NULL);
0124 if (!p) {
0125 pr_debug("rtas_msi: No %s on %pOF\n", prop_name, dn);
0126 return -ENOENT;
0127 }
0128
0129 req_msi = be32_to_cpup(p);
0130 if (req_msi < nvec) {
0131 pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec);
0132
0133 if (req_msi == 0)
0134 return -ENOSPC;
0135
0136 return req_msi;
0137 }
0138
0139 return 0;
0140 }
0141
0142 static int check_req_msi(struct pci_dev *pdev, int nvec)
0143 {
0144 return check_req(pdev, nvec, "ibm,req#msi");
0145 }
0146
0147 static int check_req_msix(struct pci_dev *pdev, int nvec)
0148 {
0149 return check_req(pdev, nvec, "ibm,req#msi-x");
0150 }
0151
0152
0153
0154 static struct device_node *__find_pe_total_msi(struct device_node *node, int *total)
0155 {
0156 struct device_node *dn;
0157 const __be32 *p;
0158
0159 dn = of_node_get(node);
0160 while (dn) {
0161 p = of_get_property(dn, "ibm,pe-total-#msi", NULL);
0162 if (p) {
0163 pr_debug("rtas_msi: found prop on dn %pOF\n",
0164 dn);
0165 *total = be32_to_cpup(p);
0166 return dn;
0167 }
0168
0169 dn = of_get_next_parent(dn);
0170 }
0171
0172 return NULL;
0173 }
0174
0175 static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total)
0176 {
0177 return __find_pe_total_msi(pci_device_to_OF_node(dev), total);
0178 }
0179
0180 static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
0181 {
0182 struct device_node *dn;
0183 struct eeh_dev *edev;
0184
0185
0186
0187 dn = pci_device_to_OF_node(dev);
0188 if (!dn)
0189 return NULL;
0190
0191
0192 edev = pdn_to_eeh_dev(PCI_DN(dn));
0193 if (edev->pe)
0194 edev = list_first_entry(&edev->pe->edevs, struct eeh_dev,
0195 entry);
0196 dn = pci_device_to_OF_node(edev->pdev);
0197 if (!dn)
0198 return NULL;
0199
0200
0201 dn = of_get_parent(dn);
0202 if (!dn)
0203 return NULL;
0204
0205
0206 *total = 8;
0207 pr_debug("rtas_msi: using PE dn %pOF\n", dn);
0208
0209 return dn;
0210 }
0211
0212 struct msi_counts {
0213 struct device_node *requestor;
0214 int num_devices;
0215 int request;
0216 int quota;
0217 int spare;
0218 int over_quota;
0219 };
0220
0221 static void *count_non_bridge_devices(struct device_node *dn, void *data)
0222 {
0223 struct msi_counts *counts = data;
0224 const __be32 *p;
0225 u32 class;
0226
0227 pr_debug("rtas_msi: counting %pOF\n", dn);
0228
0229 p = of_get_property(dn, "class-code", NULL);
0230 class = p ? be32_to_cpup(p) : 0;
0231
0232 if ((class >> 8) != PCI_CLASS_BRIDGE_PCI)
0233 counts->num_devices++;
0234
0235 return NULL;
0236 }
0237
0238 static void *count_spare_msis(struct device_node *dn, void *data)
0239 {
0240 struct msi_counts *counts = data;
0241 const __be32 *p;
0242 int req;
0243
0244 if (dn == counts->requestor)
0245 req = counts->request;
0246 else {
0247
0248
0249 req = 0;
0250 p = of_get_property(dn, "ibm,req#msi", NULL);
0251 if (p)
0252 req = be32_to_cpup(p);
0253
0254 p = of_get_property(dn, "ibm,req#msi-x", NULL);
0255 if (p)
0256 req = max(req, (int)be32_to_cpup(p));
0257 }
0258
0259 if (req < counts->quota)
0260 counts->spare += counts->quota - req;
0261 else if (req > counts->quota)
0262 counts->over_quota++;
0263
0264 return NULL;
0265 }
0266
0267 static int msi_quota_for_device(struct pci_dev *dev, int request)
0268 {
0269 struct device_node *pe_dn;
0270 struct msi_counts counts;
0271 int total;
0272
0273 pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev),
0274 request);
0275
0276 pe_dn = find_pe_total_msi(dev, &total);
0277 if (!pe_dn)
0278 pe_dn = find_pe_dn(dev, &total);
0279
0280 if (!pe_dn) {
0281 pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev));
0282 goto out;
0283 }
0284
0285 pr_debug("rtas_msi: found PE %pOF\n", pe_dn);
0286
0287 memset(&counts, 0, sizeof(struct msi_counts));
0288
0289
0290 pci_traverse_device_nodes(pe_dn, count_non_bridge_devices, &counts);
0291
0292 if (counts.num_devices == 0) {
0293 pr_err("rtas_msi: found 0 devices under PE for %s\n",
0294 pci_name(dev));
0295 goto out;
0296 }
0297
0298 counts.quota = total / counts.num_devices;
0299 if (request <= counts.quota)
0300 goto out;
0301
0302
0303 counts.requestor = pci_device_to_OF_node(dev);
0304 counts.request = request;
0305 pci_traverse_device_nodes(pe_dn, count_spare_msis, &counts);
0306
0307
0308
0309 counts.spare += total % counts.num_devices;
0310
0311
0312 if (counts.over_quota)
0313 counts.quota += counts.spare / counts.over_quota;
0314
0315
0316 request = min(counts.quota, request);
0317
0318 pr_debug("rtas_msi: request clamped to quota %d\n", request);
0319 out:
0320 of_node_put(pe_dn);
0321
0322 return request;
0323 }
0324
0325 static void rtas_hack_32bit_msi_gen2(struct pci_dev *pdev)
0326 {
0327 u32 addr_hi, addr_lo;
0328
0329
0330
0331
0332
0333
0334 dev_info(&pdev->dev,
0335 "rtas_msi: No 32 bit MSI firmware support, forcing 32 bit MSI\n");
0336 pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
0337 addr_lo = 0xffff0000 | ((addr_hi >> (48 - 32)) << 4);
0338 pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
0339 pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, 0);
0340 }
0341
0342 static int rtas_prepare_msi_irqs(struct pci_dev *pdev, int nvec_in, int type,
0343 msi_alloc_info_t *arg)
0344 {
0345 struct pci_dn *pdn;
0346 int quota, rc;
0347 int nvec = nvec_in;
0348 int use_32bit_msi_hack = 0;
0349
0350 if (type == PCI_CAP_ID_MSIX)
0351 rc = check_req_msix(pdev, nvec);
0352 else
0353 rc = check_req_msi(pdev, nvec);
0354
0355 if (rc)
0356 return rc;
0357
0358 quota = msi_quota_for_device(pdev, nvec);
0359
0360 if (quota && quota < nvec)
0361 return quota;
0362
0363
0364
0365
0366
0367 if (type == PCI_CAP_ID_MSIX) {
0368 int m = roundup_pow_of_two(nvec);
0369 quota = msi_quota_for_device(pdev, m);
0370
0371 if (quota >= m)
0372 nvec = m;
0373 }
0374
0375 pdn = pci_get_pdn(pdev);
0376
0377
0378
0379
0380
0381
0382 again:
0383 if (type == PCI_CAP_ID_MSI) {
0384 if (pdev->no_64bit_msi) {
0385 rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
0386 if (rc < 0) {
0387
0388
0389
0390
0391 if (pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT)
0392 return rc;
0393
0394 use_32bit_msi_hack = 1;
0395 }
0396 } else
0397 rc = -1;
0398
0399 if (rc < 0)
0400 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
0401
0402 if (rc < 0) {
0403 pr_debug("rtas_msi: trying the old firmware call.\n");
0404 rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
0405 }
0406
0407 if (use_32bit_msi_hack && rc > 0)
0408 rtas_hack_32bit_msi_gen2(pdev);
0409 } else
0410 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
0411
0412 if (rc != nvec) {
0413 if (nvec != nvec_in) {
0414 nvec = nvec_in;
0415 goto again;
0416 }
0417 pr_debug("rtas_msi: rtas_change_msi() failed\n");
0418 return rc;
0419 }
0420
0421 return 0;
0422 }
0423
0424 static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev,
0425 int nvec, msi_alloc_info_t *arg)
0426 {
0427 struct pci_dev *pdev = to_pci_dev(dev);
0428 int type = pdev->msix_enabled ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI;
0429
0430 return rtas_prepare_msi_irqs(pdev, nvec, type, arg);
0431 }
0432
0433
0434
0435
0436
0437
0438 static void pseries_msi_ops_msi_free(struct irq_domain *domain,
0439 struct msi_domain_info *info,
0440 unsigned int irq)
0441 {
0442 if (xive_enabled())
0443 xive_irq_free_data(irq);
0444 }
0445
0446
0447
0448
0449
0450 static void pseries_msi_domain_free_irqs(struct irq_domain *domain,
0451 struct device *dev)
0452 {
0453 if (WARN_ON_ONCE(!dev_is_pci(dev)))
0454 return;
0455
0456 __msi_domain_free_irqs(domain, dev);
0457
0458 rtas_disable_msi(to_pci_dev(dev));
0459 }
0460
0461 static struct msi_domain_ops pseries_pci_msi_domain_ops = {
0462 .msi_prepare = pseries_msi_ops_prepare,
0463 .msi_free = pseries_msi_ops_msi_free,
0464 .domain_free_irqs = pseries_msi_domain_free_irqs,
0465 };
0466
0467 static void pseries_msi_shutdown(struct irq_data *d)
0468 {
0469 d = d->parent_data;
0470 if (d->chip->irq_shutdown)
0471 d->chip->irq_shutdown(d);
0472 }
0473
0474 static void pseries_msi_mask(struct irq_data *d)
0475 {
0476 pci_msi_mask_irq(d);
0477 irq_chip_mask_parent(d);
0478 }
0479
0480 static void pseries_msi_unmask(struct irq_data *d)
0481 {
0482 pci_msi_unmask_irq(d);
0483 irq_chip_unmask_parent(d);
0484 }
0485
0486 static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
0487 {
0488 struct msi_desc *entry = irq_data_get_msi_desc(data);
0489
0490
0491
0492
0493
0494
0495
0496
0497 entry->msg = *msg;
0498 }
0499
0500 static struct irq_chip pseries_pci_msi_irq_chip = {
0501 .name = "pSeries-PCI-MSI",
0502 .irq_shutdown = pseries_msi_shutdown,
0503 .irq_mask = pseries_msi_mask,
0504 .irq_unmask = pseries_msi_unmask,
0505 .irq_eoi = irq_chip_eoi_parent,
0506 .irq_write_msi_msg = pseries_msi_write_msg,
0507 };
0508
0509
0510
0511
0512
0513
0514
0515 static struct msi_domain_info pseries_msi_domain_info = {
0516 .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
0517 MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX |
0518 MSI_FLAG_MSIX_CONTIGUOUS),
0519 .ops = &pseries_pci_msi_domain_ops,
0520 .chip = &pseries_pci_msi_irq_chip,
0521 };
0522
0523 static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
0524 {
0525 __pci_read_msi_msg(irq_data_get_msi_desc(data), msg);
0526 }
0527
0528 static struct irq_chip pseries_msi_irq_chip = {
0529 .name = "pSeries-MSI",
0530 .irq_shutdown = pseries_msi_shutdown,
0531 .irq_mask = irq_chip_mask_parent,
0532 .irq_unmask = irq_chip_unmask_parent,
0533 .irq_eoi = irq_chip_eoi_parent,
0534 .irq_set_affinity = irq_chip_set_affinity_parent,
0535 .irq_compose_msi_msg = pseries_msi_compose_msg,
0536 };
0537
0538 static int pseries_irq_parent_domain_alloc(struct irq_domain *domain, unsigned int virq,
0539 irq_hw_number_t hwirq)
0540 {
0541 struct irq_fwspec parent_fwspec;
0542 int ret;
0543
0544 parent_fwspec.fwnode = domain->parent->fwnode;
0545 parent_fwspec.param_count = 2;
0546 parent_fwspec.param[0] = hwirq;
0547 parent_fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
0548
0549 ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &parent_fwspec);
0550 if (ret)
0551 return ret;
0552
0553 return 0;
0554 }
0555
0556 static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
0557 unsigned int nr_irqs, void *arg)
0558 {
0559 struct pci_controller *phb = domain->host_data;
0560 msi_alloc_info_t *info = arg;
0561 struct msi_desc *desc = info->desc;
0562 struct pci_dev *pdev = msi_desc_to_pci_dev(desc);
0563 int hwirq;
0564 int i, ret;
0565
0566 hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->msi_index);
0567 if (hwirq < 0) {
0568 dev_err(&pdev->dev, "Failed to query HW IRQ: %d\n", hwirq);
0569 return hwirq;
0570 }
0571
0572 dev_dbg(&pdev->dev, "%s bridge %pOF %d/%x #%d\n", __func__,
0573 phb->dn, virq, hwirq, nr_irqs);
0574
0575 for (i = 0; i < nr_irqs; i++) {
0576 ret = pseries_irq_parent_domain_alloc(domain, virq + i, hwirq + i);
0577 if (ret)
0578 goto out;
0579
0580 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
0581 &pseries_msi_irq_chip, domain->host_data);
0582 }
0583
0584 return 0;
0585
0586 out:
0587
0588 irq_domain_free_irqs_parent(domain, virq, i - 1);
0589 return ret;
0590 }
0591
0592 static void pseries_irq_domain_free(struct irq_domain *domain, unsigned int virq,
0593 unsigned int nr_irqs)
0594 {
0595 struct irq_data *d = irq_domain_get_irq_data(domain, virq);
0596 struct pci_controller *phb = irq_data_get_irq_chip_data(d);
0597
0598 pr_debug("%s bridge %pOF %d #%d\n", __func__, phb->dn, virq, nr_irqs);
0599
0600
0601 }
0602
0603 static const struct irq_domain_ops pseries_irq_domain_ops = {
0604 .alloc = pseries_irq_domain_alloc,
0605 .free = pseries_irq_domain_free,
0606 };
0607
0608 static int __pseries_msi_allocate_domains(struct pci_controller *phb,
0609 unsigned int count)
0610 {
0611 struct irq_domain *parent = irq_get_default_host();
0612
0613 phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI",
0614 phb->global_number);
0615 if (!phb->fwnode)
0616 return -ENOMEM;
0617
0618 phb->dev_domain = irq_domain_create_hierarchy(parent, 0, count,
0619 phb->fwnode,
0620 &pseries_irq_domain_ops, phb);
0621 if (!phb->dev_domain) {
0622 pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n",
0623 phb->dn, phb->global_number);
0624 irq_domain_free_fwnode(phb->fwnode);
0625 return -ENOMEM;
0626 }
0627
0628 phb->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb->dn),
0629 &pseries_msi_domain_info,
0630 phb->dev_domain);
0631 if (!phb->msi_domain) {
0632 pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n",
0633 phb->dn, phb->global_number);
0634 irq_domain_free_fwnode(phb->fwnode);
0635 irq_domain_remove(phb->dev_domain);
0636 return -ENOMEM;
0637 }
0638
0639 return 0;
0640 }
0641
0642 int pseries_msi_allocate_domains(struct pci_controller *phb)
0643 {
0644 int count;
0645
0646 if (!__find_pe_total_msi(phb->dn, &count)) {
0647 pr_err("PCI: failed to find MSIs for bridge %pOF (domain %d)\n",
0648 phb->dn, phb->global_number);
0649 return -ENOSPC;
0650 }
0651
0652 return __pseries_msi_allocate_domains(phb, count);
0653 }
0654
0655 void pseries_msi_free_domains(struct pci_controller *phb)
0656 {
0657 if (phb->msi_domain)
0658 irq_domain_remove(phb->msi_domain);
0659 if (phb->dev_domain)
0660 irq_domain_remove(phb->dev_domain);
0661 if (phb->fwnode)
0662 irq_domain_free_fwnode(phb->fwnode);
0663 }
0664
0665 static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
0666 {
0667
0668 if (!pdev->irq) {
0669 dev_dbg(&pdev->dev, "rtas_msi: no LSI, nothing to do.\n");
0670 return;
0671 }
0672
0673
0674 if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) {
0675 dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n");
0676 return;
0677 }
0678
0679 dev_dbg(&pdev->dev, "rtas_msi: disabling existing MSI.\n");
0680 rtas_disable_msi(pdev);
0681 }
0682
0683 static int rtas_msi_init(void)
0684 {
0685 query_token = rtas_token("ibm,query-interrupt-source-number");
0686 change_token = rtas_token("ibm,change-msi");
0687
0688 if ((query_token == RTAS_UNKNOWN_SERVICE) ||
0689 (change_token == RTAS_UNKNOWN_SERVICE)) {
0690 pr_debug("rtas_msi: no RTAS tokens, no MSI support.\n");
0691 return -1;
0692 }
0693
0694 pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n");
0695
0696 WARN_ON(ppc_md.pci_irq_fixup);
0697 ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup;
0698
0699 return 0;
0700 }
0701 machine_arch_initcall(pseries, rtas_msi_init);