platforms/powernv/vas.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2016-17 IBM Corp.
0004  */
0005
0006 #define pr_fmt(fmt) "vas: " fmt
0007
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/export.h>
0011 #include <linux/types.h>
0012 #include <linux/slab.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/of_platform.h>
0015 #include <linux/of_address.h>
0016 #include <linux/of.h>
0017 #include <linux/irqdomain.h>
0018 #include <linux/interrupt.h>
0019 #include <asm/prom.h>
0020 #include <asm/xive.h>
0021
0022 #include "vas.h"
0023
0024 DEFINE_MUTEX(vas_mutex);
0025 static LIST_HEAD(vas_instances);
0026
0027 static DEFINE_PER_CPU(int, cpu_vas_id);
0028
0029 static int vas_irq_fault_window_setup(struct vas_instance *vinst)
0030 {
0031     int rc = 0;
0032
0033     rc = request_threaded_irq(vinst->virq, vas_fault_handler,
0034                 vas_fault_thread_fn, 0, vinst->name, vinst);
0035
0036     if (rc) {
0037         pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n",
0038                 vinst->vas_id, vinst->virq, rc);
0039         goto out;
0040     }
0041
0042     rc = vas_setup_fault_window(vinst);
0043     if (rc)
0044         free_irq(vinst->virq, vinst);
0045
0046 out:
0047     return rc;
0048 }
0049
0050 static int init_vas_instance(struct platform_device *pdev)
0051 {
0052     struct device_node *dn = pdev->dev.of_node;
0053     struct vas_instance *vinst;
0054     struct xive_irq_data *xd;
0055     uint32_t chipid, hwirq;
0056     struct resource *res;
0057     int rc, cpu, vasid;
0058
0059     rc = of_property_read_u32(dn, "ibm,vas-id", &vasid);
0060     if (rc) {
0061         pr_err("No ibm,vas-id property for %s?\n", pdev->name);
0062         return -ENODEV;
0063     }
0064
0065     rc = of_property_read_u32(dn, "ibm,chip-id", &chipid);
0066     if (rc) {
0067         pr_err("No ibm,chip-id property for %s?\n", pdev->name);
0068         return -ENODEV;
0069     }
0070
0071     if (pdev->num_resources != 4) {
0072         pr_err("Unexpected DT configuration for [%s, %d]\n",
0073                 pdev->name, vasid);
0074         return -ENODEV;
0075     }
0076
0077     vinst = kzalloc(sizeof(*vinst), GFP_KERNEL);
0078     if (!vinst)
0079         return -ENOMEM;
0080
0081     vinst->name = kasprintf(GFP_KERNEL, "vas-%d", vasid);
0082     if (!vinst->name) {
0083         kfree(vinst);
0084         return -ENOMEM;
0085     }
0086
0087     INIT_LIST_HEAD(&vinst->node);
0088     ida_init(&vinst->ida);
0089     mutex_init(&vinst->mutex);
0090     vinst->vas_id = vasid;
0091     vinst->pdev = pdev;
0092
0093     res = &pdev->resource[0];
0094     vinst->hvwc_bar_start = res->start;
0095
0096     res = &pdev->resource[1];
0097     vinst->uwc_bar_start = res->start;
0098
0099     res = &pdev->resource[2];
0100     vinst->paste_base_addr = res->start;
0101
0102     res = &pdev->resource[3];
0103     if (res->end > 62) {
0104         pr_err("Bad 'paste_win_id_shift' in DT, %llx\n", res->end);
0105         goto free_vinst;
0106     }
0107
0108     vinst->paste_win_id_shift = 63 - res->end;
0109
0110     hwirq = xive_native_alloc_irq_on_chip(chipid);
0111     if (!hwirq) {
0112         pr_err("Inst%d: Unable to allocate global irq for chip %d\n",
0113                 vinst->vas_id, chipid);
0114         return -ENOENT;
0115     }
0116
0117     vinst->virq = irq_create_mapping(NULL, hwirq);
0118     if (!vinst->virq) {
0119         pr_err("Inst%d: Unable to map global irq %d\n",
0120                 vinst->vas_id, hwirq);
0121         return -EINVAL;
0122     }
0123
0124     xd = irq_get_handler_data(vinst->virq);
0125     if (!xd) {
0126         pr_err("Inst%d: Invalid virq %d\n",
0127                 vinst->vas_id, vinst->virq);
0128         return -EINVAL;
0129     }
0130
0131     vinst->irq_port = xd->trig_page;
0132     pr_devel("Initialized instance [%s, %d] paste_base 0x%llx paste_win_id_shift 0x%llx IRQ %d Port 0x%llx\n",
0133             pdev->name, vasid, vinst->paste_base_addr,
0134             vinst->paste_win_id_shift, vinst->virq,
0135             vinst->irq_port);
0136
0137     for_each_possible_cpu(cpu) {
0138         if (cpu_to_chip_id(cpu) == of_get_ibm_chip_id(dn))
0139             per_cpu(cpu_vas_id, cpu) = vasid;
0140     }
0141
0142     mutex_lock(&vas_mutex);
0143     list_add(&vinst->node, &vas_instances);
0144     mutex_unlock(&vas_mutex);
0145
0146     spin_lock_init(&vinst->fault_lock);
0147     /*
0148      * IRQ and fault handling setup is needed only for user space
0149      * send windows.
0150      */
0151     if (vinst->virq) {
0152         rc = vas_irq_fault_window_setup(vinst);
0153         /*
0154          * Fault window is used only for user space send windows.
0155          * So if vinst->virq is NULL, tx_win_open returns -ENODEV
0156          * for user space.
0157          */
0158         if (rc)
0159             vinst->virq = 0;
0160     }
0161
0162     vas_instance_init_dbgdir(vinst);
0163
0164     dev_set_drvdata(&pdev->dev, vinst);
0165
0166     return 0;
0167
0168 free_vinst:
0169     kfree(vinst->name);
0170     kfree(vinst);
0171     return -ENODEV;
0172
0173 }
0174
0175 /*
0176  * Although this is read/used multiple times, it is written to only
0177  * during initialization.
0178  */
0179 struct vas_instance *find_vas_instance(int vasid)
0180 {
0181     struct list_head *ent;
0182     struct vas_instance *vinst;
0183
0184     mutex_lock(&vas_mutex);
0185
0186     if (vasid == -1)
0187         vasid = per_cpu(cpu_vas_id, smp_processor_id());
0188
0189     list_for_each(ent, &vas_instances) {
0190         vinst = list_entry(ent, struct vas_instance, node);
0191         if (vinst->vas_id == vasid) {
0192             mutex_unlock(&vas_mutex);
0193             return vinst;
0194         }
0195     }
0196     mutex_unlock(&vas_mutex);
0197
0198     pr_devel("Instance %d not found\n", vasid);
0199     return NULL;
0200 }
0201
0202 int chip_to_vas_id(int chipid)
0203 {
0204     int cpu;
0205
0206     for_each_possible_cpu(cpu) {
0207         if (cpu_to_chip_id(cpu) == chipid)
0208             return per_cpu(cpu_vas_id, cpu);
0209     }
0210     return -1;
0211 }
0212 EXPORT_SYMBOL(chip_to_vas_id);
0213
0214 static int vas_probe(struct platform_device *pdev)
0215 {
0216     return init_vas_instance(pdev);
0217 }
0218
0219 static const struct of_device_id powernv_vas_match[] = {
0220     { .compatible = "ibm,vas",},
0221     {},
0222 };
0223
0224 static struct platform_driver vas_driver = {
0225     .driver = {
0226         .name = "vas",
0227         .of_match_table = powernv_vas_match,
0228     },
0229     .probe = vas_probe,
0230 };
0231
0232 static int __init vas_init(void)
0233 {
0234     int found = 0;
0235     struct device_node *dn;
0236
0237     platform_driver_register(&vas_driver);
0238
0239     for_each_compatible_node(dn, NULL, "ibm,vas") {
0240         of_platform_device_create(dn, NULL, NULL);
0241         found++;
0242     }
0243
0244     if (!found) {
0245         platform_driver_unregister(&vas_driver);
0246         return -ENODEV;
0247     }
0248
0249     pr_devel("Found %d instances\n", found);
0250
0251     return 0;
0252 }
0253 device_initcall(vas_init);