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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * arch/powerpc/platforms/powermac/low_i2c.c
0004  *
0005  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
0006  *
0007  * The linux i2c layer isn't completely suitable for our needs for various
0008  * reasons ranging from too late initialisation to semantics not perfectly
0009  * matching some requirements of the apple platform functions etc...
0010  *
0011  * This file thus provides a simple low level unified i2c interface for
0012  * powermac that covers the various types of i2c busses used in Apple machines.
0013  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
0014  * banging busses found on older chipsets in earlier machines if we ever need
0015  * one of them.
0016  *
0017  * The drivers in this file are synchronous/blocking. In addition, the
0018  * keywest one is fairly slow due to the use of msleep instead of interrupts
0019  * as the interrupt is currently used by i2c-keywest. In the long run, we
0020  * might want to get rid of those high-level interfaces to linux i2c layer
0021  * either completely (converting all drivers) or replacing them all with a
0022  * single stub driver on top of this one. Once done, the interrupt will be
0023  * available for our use.
0024  */
0025 
0026 #undef DEBUG
0027 #undef DEBUG_LOW
0028 
0029 #include <linux/types.h>
0030 #include <linux/sched.h>
0031 #include <linux/init.h>
0032 #include <linux/export.h>
0033 #include <linux/adb.h>
0034 #include <linux/pmu.h>
0035 #include <linux/delay.h>
0036 #include <linux/completion.h>
0037 #include <linux/platform_device.h>
0038 #include <linux/interrupt.h>
0039 #include <linux/timer.h>
0040 #include <linux/mutex.h>
0041 #include <linux/i2c.h>
0042 #include <linux/slab.h>
0043 #include <linux/of_irq.h>
0044 #include <asm/keylargo.h>
0045 #include <asm/uninorth.h>
0046 #include <asm/io.h>
0047 #include <asm/machdep.h>
0048 #include <asm/smu.h>
0049 #include <asm/pmac_pfunc.h>
0050 #include <asm/pmac_low_i2c.h>
0051 
0052 #ifdef DEBUG
0053 #define DBG(x...) do {\
0054         printk(KERN_DEBUG "low_i2c:" x);    \
0055     } while(0)
0056 #else
0057 #define DBG(x...)
0058 #endif
0059 
0060 #ifdef DEBUG_LOW
0061 #define DBG_LOW(x...) do {\
0062         printk(KERN_DEBUG "low_i2c:" x);    \
0063     } while(0)
0064 #else
0065 #define DBG_LOW(x...)
0066 #endif
0067 
0068 
0069 static int pmac_i2c_force_poll = 1;
0070 
0071 /*
0072  * A bus structure. Each bus in the system has such a structure associated.
0073  */
0074 struct pmac_i2c_bus
0075 {
0076     struct list_head    link;
0077     struct device_node  *controller;
0078     struct device_node  *busnode;
0079     int         type;
0080     int         flags;
0081     struct i2c_adapter  adapter;
0082     void            *hostdata;
0083     int         channel;    /* some hosts have multiple */
0084     int         mode;       /* current mode */
0085     struct mutex        mutex;
0086     int         opened;
0087     int         polled;     /* open mode */
0088     struct platform_device  *platform_dev;
0089     struct lock_class_key   lock_key;
0090 
0091     /* ops */
0092     int (*open)(struct pmac_i2c_bus *bus);
0093     void (*close)(struct pmac_i2c_bus *bus);
0094     int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
0095             u32 subaddr, u8 *data, int len);
0096 };
0097 
0098 static LIST_HEAD(pmac_i2c_busses);
0099 
0100 /*
0101  * Keywest implementation
0102  */
0103 
0104 struct pmac_i2c_host_kw
0105 {
0106     struct mutex        mutex;      /* Access mutex for use by
0107                          * i2c-keywest */
0108     void __iomem        *base;      /* register base address */
0109     int         bsteps;     /* register stepping */
0110     int         speed;      /* speed */
0111     int         irq;
0112     u8          *data;
0113     unsigned        len;
0114     int         state;
0115     int         rw;
0116     int         polled;
0117     int         result;
0118     struct completion   complete;
0119     spinlock_t      lock;
0120     struct timer_list   timeout_timer;
0121 };
0122 
0123 /* Register indices */
0124 typedef enum {
0125     reg_mode = 0,
0126     reg_control,
0127     reg_status,
0128     reg_isr,
0129     reg_ier,
0130     reg_addr,
0131     reg_subaddr,
0132     reg_data
0133 } reg_t;
0134 
0135 /* The Tumbler audio equalizer can be really slow sometimes */
0136 #define KW_POLL_TIMEOUT     (2*HZ)
0137 
0138 /* Mode register */
0139 #define KW_I2C_MODE_100KHZ  0x00
0140 #define KW_I2C_MODE_50KHZ   0x01
0141 #define KW_I2C_MODE_25KHZ   0x02
0142 #define KW_I2C_MODE_DUMB    0x00
0143 #define KW_I2C_MODE_STANDARD    0x04
0144 #define KW_I2C_MODE_STANDARDSUB 0x08
0145 #define KW_I2C_MODE_COMBINED    0x0C
0146 #define KW_I2C_MODE_MODE_MASK   0x0C
0147 #define KW_I2C_MODE_CHAN_MASK   0xF0
0148 
0149 /* Control register */
0150 #define KW_I2C_CTL_AAK      0x01
0151 #define KW_I2C_CTL_XADDR    0x02
0152 #define KW_I2C_CTL_STOP     0x04
0153 #define KW_I2C_CTL_START    0x08
0154 
0155 /* Status register */
0156 #define KW_I2C_STAT_BUSY    0x01
0157 #define KW_I2C_STAT_LAST_AAK    0x02
0158 #define KW_I2C_STAT_LAST_RW 0x04
0159 #define KW_I2C_STAT_SDA     0x08
0160 #define KW_I2C_STAT_SCL     0x10
0161 
0162 /* IER & ISR registers */
0163 #define KW_I2C_IRQ_DATA     0x01
0164 #define KW_I2C_IRQ_ADDR     0x02
0165 #define KW_I2C_IRQ_STOP     0x04
0166 #define KW_I2C_IRQ_START    0x08
0167 #define KW_I2C_IRQ_MASK     0x0F
0168 
0169 /* State machine states */
0170 enum {
0171     state_idle,
0172     state_addr,
0173     state_read,
0174     state_write,
0175     state_stop,
0176     state_dead
0177 };
0178 
0179 #define WRONG_STATE(name) do {\
0180         printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
0181                "(isr: %02x)\n", \
0182                name, __kw_state_names[host->state], isr); \
0183     } while(0)
0184 
0185 static const char *__kw_state_names[] = {
0186     "state_idle",
0187     "state_addr",
0188     "state_read",
0189     "state_write",
0190     "state_stop",
0191     "state_dead"
0192 };
0193 
0194 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
0195 {
0196     return readb(host->base + (((unsigned int)reg) << host->bsteps));
0197 }
0198 
0199 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
0200                   reg_t reg, u8 val)
0201 {
0202     writeb(val, host->base + (((unsigned)reg) << host->bsteps));
0203     (void)__kw_read_reg(host, reg_subaddr);
0204 }
0205 
0206 #define kw_write_reg(reg, val)  __kw_write_reg(host, reg, val)
0207 #define kw_read_reg(reg)    __kw_read_reg(host, reg)
0208 
0209 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
0210 {
0211     int i, j;
0212     u8 isr;
0213     
0214     for (i = 0; i < 1000; i++) {
0215         isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
0216         if (isr != 0)
0217             return isr;
0218 
0219         /* This code is used with the timebase frozen, we cannot rely
0220          * on udelay nor schedule when in polled mode !
0221          * For now, just use a bogus loop....
0222          */
0223         if (host->polled) {
0224             for (j = 1; j < 100000; j++)
0225                 mb();
0226         } else
0227             msleep(1);
0228     }
0229     return isr;
0230 }
0231 
0232 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
0233 {
0234     kw_write_reg(reg_control, KW_I2C_CTL_STOP);
0235     host->state = state_stop;
0236     host->result = result;
0237 }
0238 
0239 
0240 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
0241 {
0242     u8 ack;
0243 
0244     DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
0245         __kw_state_names[host->state], isr);
0246 
0247     if (host->state == state_idle) {
0248         printk(KERN_WARNING "low_i2c: Keywest got an out of state"
0249                " interrupt, ignoring\n");
0250         kw_write_reg(reg_isr, isr);
0251         return;
0252     }
0253 
0254     if (isr == 0) {
0255         printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
0256                " on keywest !\n");
0257         if (host->state != state_stop) {
0258             kw_i2c_do_stop(host, -EIO);
0259             return;
0260         }
0261         ack = kw_read_reg(reg_status);
0262         if (ack & KW_I2C_STAT_BUSY)
0263             kw_write_reg(reg_status, 0);
0264         host->state = state_idle;
0265         kw_write_reg(reg_ier, 0x00);
0266         if (!host->polled)
0267             complete(&host->complete);
0268         return;
0269     }
0270 
0271     if (isr & KW_I2C_IRQ_ADDR) {
0272         ack = kw_read_reg(reg_status);
0273         if (host->state != state_addr) {
0274             WRONG_STATE("KW_I2C_IRQ_ADDR"); 
0275             kw_i2c_do_stop(host, -EIO);
0276         }
0277         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
0278             host->result = -ENXIO;
0279             host->state = state_stop;
0280             DBG_LOW("KW: NAK on address\n");
0281         } else {
0282             if (host->len == 0)
0283                 kw_i2c_do_stop(host, 0);
0284             else if (host->rw) {
0285                 host->state = state_read;
0286                 if (host->len > 1)
0287                     kw_write_reg(reg_control,
0288                              KW_I2C_CTL_AAK);
0289             } else {
0290                 host->state = state_write;
0291                 kw_write_reg(reg_data, *(host->data++));
0292                 host->len--;
0293             }
0294         }
0295         kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
0296     }
0297 
0298     if (isr & KW_I2C_IRQ_DATA) {
0299         if (host->state == state_read) {
0300             *(host->data++) = kw_read_reg(reg_data);
0301             host->len--;
0302             kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
0303             if (host->len == 0)
0304                 host->state = state_stop;
0305             else if (host->len == 1)
0306                 kw_write_reg(reg_control, 0);
0307         } else if (host->state == state_write) {
0308             ack = kw_read_reg(reg_status);
0309             if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
0310                 DBG_LOW("KW: nack on data write\n");
0311                 host->result = -EFBIG;
0312                 host->state = state_stop;
0313             } else if (host->len) {
0314                 kw_write_reg(reg_data, *(host->data++));
0315                 host->len--;
0316             } else
0317                 kw_i2c_do_stop(host, 0);
0318         } else {
0319             WRONG_STATE("KW_I2C_IRQ_DATA"); 
0320             if (host->state != state_stop)
0321                 kw_i2c_do_stop(host, -EIO);
0322         }
0323         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
0324     }
0325 
0326     if (isr & KW_I2C_IRQ_STOP) {
0327         kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
0328         if (host->state != state_stop) {
0329             WRONG_STATE("KW_I2C_IRQ_STOP");
0330             host->result = -EIO;
0331         }
0332         host->state = state_idle;
0333         if (!host->polled)
0334             complete(&host->complete);
0335     }
0336 
0337     /* Below should only happen in manual mode which we don't use ... */
0338     if (isr & KW_I2C_IRQ_START)
0339         kw_write_reg(reg_isr, KW_I2C_IRQ_START);
0340 
0341 }
0342 
0343 /* Interrupt handler */
0344 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
0345 {
0346     struct pmac_i2c_host_kw *host = dev_id;
0347     unsigned long flags;
0348 
0349     spin_lock_irqsave(&host->lock, flags);
0350     del_timer(&host->timeout_timer);
0351     kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
0352     if (host->state != state_idle) {
0353         host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
0354         add_timer(&host->timeout_timer);
0355     }
0356     spin_unlock_irqrestore(&host->lock, flags);
0357     return IRQ_HANDLED;
0358 }
0359 
0360 static void kw_i2c_timeout(struct timer_list *t)
0361 {
0362     struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
0363     unsigned long flags;
0364 
0365     spin_lock_irqsave(&host->lock, flags);
0366 
0367     /*
0368      * If the timer is pending, that means we raced with the
0369      * irq, in which case we just return
0370      */
0371     if (timer_pending(&host->timeout_timer))
0372         goto skip;
0373 
0374     kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
0375     if (host->state != state_idle) {
0376         host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
0377         add_timer(&host->timeout_timer);
0378     }
0379  skip:
0380     spin_unlock_irqrestore(&host->lock, flags);
0381 }
0382 
0383 static int kw_i2c_open(struct pmac_i2c_bus *bus)
0384 {
0385     struct pmac_i2c_host_kw *host = bus->hostdata;
0386     mutex_lock(&host->mutex);
0387     return 0;
0388 }
0389 
0390 static void kw_i2c_close(struct pmac_i2c_bus *bus)
0391 {
0392     struct pmac_i2c_host_kw *host = bus->hostdata;
0393     mutex_unlock(&host->mutex);
0394 }
0395 
0396 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
0397                u32 subaddr, u8 *data, int len)
0398 {
0399     struct pmac_i2c_host_kw *host = bus->hostdata;
0400     u8 mode_reg = host->speed;
0401     int use_irq = host->irq && !bus->polled;
0402 
0403     /* Setup mode & subaddress if any */
0404     switch(bus->mode) {
0405     case pmac_i2c_mode_dumb:
0406         return -EINVAL;
0407     case pmac_i2c_mode_std:
0408         mode_reg |= KW_I2C_MODE_STANDARD;
0409         if (subsize != 0)
0410             return -EINVAL;
0411         break;
0412     case pmac_i2c_mode_stdsub:
0413         mode_reg |= KW_I2C_MODE_STANDARDSUB;
0414         if (subsize != 1)
0415             return -EINVAL;
0416         break;
0417     case pmac_i2c_mode_combined:
0418         mode_reg |= KW_I2C_MODE_COMBINED;
0419         if (subsize != 1)
0420             return -EINVAL;
0421         break;
0422     }
0423 
0424     /* Setup channel & clear pending irqs */
0425     kw_write_reg(reg_isr, kw_read_reg(reg_isr));
0426     kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
0427     kw_write_reg(reg_status, 0);
0428 
0429     /* Set up address and r/w bit, strip possible stale bus number from
0430      * address top bits
0431      */
0432     kw_write_reg(reg_addr, addrdir & 0xff);
0433 
0434     /* Set up the sub address */
0435     if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
0436         || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
0437         kw_write_reg(reg_subaddr, subaddr);
0438 
0439     /* Prepare for async operations */
0440     host->data = data;
0441     host->len = len;
0442     host->state = state_addr;
0443     host->result = 0;
0444     host->rw = (addrdir & 1);
0445     host->polled = bus->polled;
0446 
0447     /* Enable interrupt if not using polled mode and interrupt is
0448      * available
0449      */
0450     if (use_irq) {
0451         /* Clear completion */
0452         reinit_completion(&host->complete);
0453         /* Ack stale interrupts */
0454         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
0455         /* Arm timeout */
0456         host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
0457         add_timer(&host->timeout_timer);
0458         /* Enable emission */
0459         kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
0460     }
0461 
0462     /* Start sending address */
0463     kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
0464 
0465     /* Wait for completion */
0466     if (use_irq)
0467         wait_for_completion(&host->complete);
0468     else {
0469         while(host->state != state_idle) {
0470             unsigned long flags;
0471 
0472             u8 isr = kw_i2c_wait_interrupt(host);
0473             spin_lock_irqsave(&host->lock, flags);
0474             kw_i2c_handle_interrupt(host, isr);
0475             spin_unlock_irqrestore(&host->lock, flags);
0476         }
0477     }
0478 
0479     /* Disable emission */
0480     kw_write_reg(reg_ier, 0);
0481 
0482     return host->result;
0483 }
0484 
0485 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
0486 {
0487     struct pmac_i2c_host_kw *host;
0488     const u32       *psteps, *prate, *addrp;
0489     u32         steps;
0490 
0491     host = kzalloc(sizeof(*host), GFP_KERNEL);
0492     if (host == NULL) {
0493         printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
0494                np);
0495         return NULL;
0496     }
0497 
0498     /* Apple is kind enough to provide a valid AAPL,address property
0499      * on all i2c keywest nodes so far ... we would have to fallback
0500      * to macio parsing if that wasn't the case
0501      */
0502     addrp = of_get_property(np, "AAPL,address", NULL);
0503     if (addrp == NULL) {
0504         printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
0505                np);
0506         kfree(host);
0507         return NULL;
0508     }
0509     mutex_init(&host->mutex);
0510     init_completion(&host->complete);
0511     spin_lock_init(&host->lock);
0512     timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
0513 
0514     psteps = of_get_property(np, "AAPL,address-step", NULL);
0515     steps = psteps ? (*psteps) : 0x10;
0516     for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
0517         steps >>= 1;
0518     /* Select interface rate */
0519     host->speed = KW_I2C_MODE_25KHZ;
0520     prate = of_get_property(np, "AAPL,i2c-rate", NULL);
0521     if (prate) switch(*prate) {
0522     case 100:
0523         host->speed = KW_I2C_MODE_100KHZ;
0524         break;
0525     case 50:
0526         host->speed = KW_I2C_MODE_50KHZ;
0527         break;
0528     case 25:
0529         host->speed = KW_I2C_MODE_25KHZ;
0530         break;
0531     }   
0532     host->irq = irq_of_parse_and_map(np, 0);
0533     if (!host->irq)
0534         printk(KERN_WARNING
0535                "low_i2c: Failed to map interrupt for %pOF\n",
0536                np);
0537 
0538     host->base = ioremap((*addrp), 0x1000);
0539     if (host->base == NULL) {
0540         printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
0541                np);
0542         kfree(host);
0543         return NULL;
0544     }
0545 
0546     /* Make sure IRQ is disabled */
0547     kw_write_reg(reg_ier, 0);
0548 
0549     /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
0550      * want that interrupt disabled between the 2 passes of driver
0551      * suspend or we'll have issues running the pfuncs
0552      */
0553     if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
0554             "keywest i2c", host))
0555         host->irq = 0;
0556 
0557     printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
0558            *addrp, host->irq, np);
0559 
0560     return host;
0561 }
0562 
0563 
0564 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
0565                   struct device_node *controller,
0566                   struct device_node *busnode,
0567                   int channel)
0568 {
0569     struct pmac_i2c_bus *bus;
0570 
0571     bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
0572     if (bus == NULL)
0573         return;
0574 
0575     bus->controller = of_node_get(controller);
0576     bus->busnode = of_node_get(busnode);
0577     bus->type = pmac_i2c_bus_keywest;
0578     bus->hostdata = host;
0579     bus->channel = channel;
0580     bus->mode = pmac_i2c_mode_std;
0581     bus->open = kw_i2c_open;
0582     bus->close = kw_i2c_close;
0583     bus->xfer = kw_i2c_xfer;
0584     mutex_init(&bus->mutex);
0585     lockdep_register_key(&bus->lock_key);
0586     lockdep_set_class(&bus->mutex, &bus->lock_key);
0587     if (controller == busnode)
0588         bus->flags = pmac_i2c_multibus;
0589     list_add(&bus->link, &pmac_i2c_busses);
0590 
0591     printk(KERN_INFO " channel %d bus %s\n", channel,
0592            (controller == busnode) ? "<multibus>" : busnode->full_name);
0593 }
0594 
0595 static void __init kw_i2c_probe(void)
0596 {
0597     struct device_node *np, *child, *parent;
0598 
0599     /* Probe keywest-i2c busses */
0600     for_each_compatible_node(np, "i2c","keywest-i2c") {
0601         struct pmac_i2c_host_kw *host;
0602         int multibus;
0603 
0604         /* Found one, init a host structure */
0605         host = kw_i2c_host_init(np);
0606         if (host == NULL)
0607             continue;
0608 
0609         /* Now check if we have a multibus setup (old style) or if we
0610          * have proper bus nodes. Note that the "new" way (proper bus
0611          * nodes) might cause us to not create some busses that are
0612          * kept hidden in the device-tree. In the future, we might
0613          * want to work around that by creating busses without a node
0614          * but not for now
0615          */
0616         child = of_get_next_child(np, NULL);
0617         multibus = !of_node_name_eq(child, "i2c-bus");
0618         of_node_put(child);
0619 
0620         /* For a multibus setup, we get the bus count based on the
0621          * parent type
0622          */
0623         if (multibus) {
0624             int chans, i;
0625 
0626             parent = of_get_parent(np);
0627             if (parent == NULL)
0628                 continue;
0629             chans = parent->name[0] == 'u' ? 2 : 1;
0630             for (i = 0; i < chans; i++)
0631                 kw_i2c_add(host, np, np, i);
0632         } else {
0633             for_each_child_of_node(np, child) {
0634                 const u32 *reg = of_get_property(child,
0635                         "reg", NULL);
0636                 if (reg == NULL)
0637                     continue;
0638                 kw_i2c_add(host, np, child, *reg);
0639             }
0640         }
0641     }
0642 }
0643 
0644 
0645 /*
0646  *
0647  * PMU implementation
0648  *
0649  */
0650 
0651 #ifdef CONFIG_ADB_PMU
0652 
0653 /*
0654  * i2c command block to the PMU
0655  */
0656 struct pmu_i2c_hdr {
0657     u8  bus;
0658     u8  mode;
0659     u8  bus2;
0660     u8  address;
0661     u8  sub_addr;
0662     u8  comb_addr;
0663     u8  count;
0664     u8  data[];
0665 };
0666 
0667 static void pmu_i2c_complete(struct adb_request *req)
0668 {
0669     complete(req->arg);
0670 }
0671 
0672 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
0673             u32 subaddr, u8 *data, int len)
0674 {
0675     struct adb_request *req = bus->hostdata;
0676     struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
0677     struct completion comp;
0678     int read = addrdir & 1;
0679     int retry;
0680     int rc = 0;
0681 
0682     /* For now, limit ourselves to 16 bytes transfers */
0683     if (len > 16)
0684         return -EINVAL;
0685 
0686     init_completion(&comp);
0687 
0688     for (retry = 0; retry < 16; retry++) {
0689         memset(req, 0, sizeof(struct adb_request));
0690         hdr->bus = bus->channel;
0691         hdr->count = len;
0692 
0693         switch(bus->mode) {
0694         case pmac_i2c_mode_std:
0695             if (subsize != 0)
0696                 return -EINVAL;
0697             hdr->address = addrdir;
0698             hdr->mode = PMU_I2C_MODE_SIMPLE;
0699             break;
0700         case pmac_i2c_mode_stdsub:
0701         case pmac_i2c_mode_combined:
0702             if (subsize != 1)
0703                 return -EINVAL;
0704             hdr->address = addrdir & 0xfe;
0705             hdr->comb_addr = addrdir;
0706             hdr->sub_addr = subaddr;
0707             if (bus->mode == pmac_i2c_mode_stdsub)
0708                 hdr->mode = PMU_I2C_MODE_STDSUB;
0709             else
0710                 hdr->mode = PMU_I2C_MODE_COMBINED;
0711             break;
0712         default:
0713             return -EINVAL;
0714         }
0715 
0716         reinit_completion(&comp);
0717         req->data[0] = PMU_I2C_CMD;
0718         req->reply[0] = 0xff;
0719         req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
0720         req->done = pmu_i2c_complete;
0721         req->arg = &comp;
0722         if (!read && len) {
0723             memcpy(hdr->data, data, len);
0724             req->nbytes += len;
0725         }
0726         rc = pmu_queue_request(req);
0727         if (rc)
0728             return rc;
0729         wait_for_completion(&comp);
0730         if (req->reply[0] == PMU_I2C_STATUS_OK)
0731             break;
0732         msleep(15);
0733     }
0734     if (req->reply[0] != PMU_I2C_STATUS_OK)
0735         return -EIO;
0736 
0737     for (retry = 0; retry < 16; retry++) {
0738         memset(req, 0, sizeof(struct adb_request));
0739 
0740         /* I know that looks like a lot, slow as hell, but darwin
0741          * does it so let's be on the safe side for now
0742          */
0743         msleep(15);
0744 
0745         hdr->bus = PMU_I2C_BUS_STATUS;
0746 
0747         reinit_completion(&comp);
0748         req->data[0] = PMU_I2C_CMD;
0749         req->reply[0] = 0xff;
0750         req->nbytes = 2;
0751         req->done = pmu_i2c_complete;
0752         req->arg = &comp;
0753         rc = pmu_queue_request(req);
0754         if (rc)
0755             return rc;
0756         wait_for_completion(&comp);
0757 
0758         if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
0759             return 0;
0760         if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
0761             int rlen = req->reply_len - 1;
0762 
0763             if (rlen != len) {
0764                 printk(KERN_WARNING "low_i2c: PMU returned %d"
0765                        " bytes, expected %d !\n", rlen, len);
0766                 return -EIO;
0767             }
0768             if (len)
0769                 memcpy(data, &req->reply[1], len);
0770             return 0;
0771         }
0772     }
0773     return -EIO;
0774 }
0775 
0776 static void __init pmu_i2c_probe(void)
0777 {
0778     struct pmac_i2c_bus *bus;
0779     struct device_node *busnode;
0780     int channel, sz;
0781 
0782     if (!pmu_present())
0783         return;
0784 
0785     /* There might or might not be a "pmu-i2c" node, we use that
0786      * or via-pmu itself, whatever we find. I haven't seen a machine
0787      * with separate bus nodes, so we assume a multibus setup
0788      */
0789     busnode = of_find_node_by_name(NULL, "pmu-i2c");
0790     if (busnode == NULL)
0791         busnode = of_find_node_by_name(NULL, "via-pmu");
0792     if (busnode == NULL)
0793         return;
0794 
0795     printk(KERN_INFO "PMU i2c %pOF\n", busnode);
0796 
0797     /*
0798      * We add bus 1 and 2 only for now, bus 0 is "special"
0799      */
0800     for (channel = 1; channel <= 2; channel++) {
0801         sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
0802         bus = kzalloc(sz, GFP_KERNEL);
0803         if (bus == NULL)
0804             return;
0805 
0806         bus->controller = busnode;
0807         bus->busnode = busnode;
0808         bus->type = pmac_i2c_bus_pmu;
0809         bus->channel = channel;
0810         bus->mode = pmac_i2c_mode_std;
0811         bus->hostdata = bus + 1;
0812         bus->xfer = pmu_i2c_xfer;
0813         mutex_init(&bus->mutex);
0814         lockdep_register_key(&bus->lock_key);
0815         lockdep_set_class(&bus->mutex, &bus->lock_key);
0816         bus->flags = pmac_i2c_multibus;
0817         list_add(&bus->link, &pmac_i2c_busses);
0818 
0819         printk(KERN_INFO " channel %d bus <multibus>\n", channel);
0820     }
0821 }
0822 
0823 #endif /* CONFIG_ADB_PMU */
0824 
0825 
0826 /*
0827  *
0828  * SMU implementation
0829  *
0830  */
0831 
0832 #ifdef CONFIG_PMAC_SMU
0833 
0834 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
0835 {
0836     complete(misc);
0837 }
0838 
0839 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
0840             u32 subaddr, u8 *data, int len)
0841 {
0842     struct smu_i2c_cmd *cmd = bus->hostdata;
0843     struct completion comp;
0844     int read = addrdir & 1;
0845     int rc = 0;
0846 
0847     if ((read && len > SMU_I2C_READ_MAX) ||
0848         ((!read) && len > SMU_I2C_WRITE_MAX))
0849         return -EINVAL;
0850 
0851     memset(cmd, 0, sizeof(struct smu_i2c_cmd));
0852     cmd->info.bus = bus->channel;
0853     cmd->info.devaddr = addrdir;
0854     cmd->info.datalen = len;
0855 
0856     switch(bus->mode) {
0857     case pmac_i2c_mode_std:
0858         if (subsize != 0)
0859             return -EINVAL;
0860         cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
0861         break;
0862     case pmac_i2c_mode_stdsub:
0863     case pmac_i2c_mode_combined:
0864         if (subsize > 3 || subsize < 1)
0865             return -EINVAL;
0866         cmd->info.sublen = subsize;
0867         /* that's big-endian only but heh ! */
0868         memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
0869                subsize);
0870         if (bus->mode == pmac_i2c_mode_stdsub)
0871             cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
0872         else
0873             cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
0874         break;
0875     default:
0876         return -EINVAL;
0877     }
0878     if (!read && len)
0879         memcpy(cmd->info.data, data, len);
0880 
0881     init_completion(&comp);
0882     cmd->done = smu_i2c_complete;
0883     cmd->misc = &comp;
0884     rc = smu_queue_i2c(cmd);
0885     if (rc < 0)
0886         return rc;
0887     wait_for_completion(&comp);
0888     rc = cmd->status;
0889 
0890     if (read && len)
0891         memcpy(data, cmd->info.data, len);
0892     return rc < 0 ? rc : 0;
0893 }
0894 
0895 static void __init smu_i2c_probe(void)
0896 {
0897     struct device_node *controller, *busnode;
0898     struct pmac_i2c_bus *bus;
0899     const u32 *reg;
0900     int sz;
0901 
0902     if (!smu_present())
0903         return;
0904 
0905     controller = of_find_node_by_name(NULL, "smu-i2c-control");
0906     if (controller == NULL)
0907         controller = of_find_node_by_name(NULL, "smu");
0908     if (controller == NULL)
0909         return;
0910 
0911     printk(KERN_INFO "SMU i2c %pOF\n", controller);
0912 
0913     /* Look for childs, note that they might not be of the right
0914      * type as older device trees mix i2c busses and other things
0915      * at the same level
0916      */
0917     for_each_child_of_node(controller, busnode) {
0918         if (!of_node_is_type(busnode, "i2c") &&
0919             !of_node_is_type(busnode, "i2c-bus"))
0920             continue;
0921         reg = of_get_property(busnode, "reg", NULL);
0922         if (reg == NULL)
0923             continue;
0924 
0925         sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
0926         bus = kzalloc(sz, GFP_KERNEL);
0927         if (bus == NULL)
0928             return;
0929 
0930         bus->controller = controller;
0931         bus->busnode = of_node_get(busnode);
0932         bus->type = pmac_i2c_bus_smu;
0933         bus->channel = *reg;
0934         bus->mode = pmac_i2c_mode_std;
0935         bus->hostdata = bus + 1;
0936         bus->xfer = smu_i2c_xfer;
0937         mutex_init(&bus->mutex);
0938         lockdep_register_key(&bus->lock_key);
0939         lockdep_set_class(&bus->mutex, &bus->lock_key);
0940         bus->flags = 0;
0941         list_add(&bus->link, &pmac_i2c_busses);
0942 
0943         printk(KERN_INFO " channel %x bus %pOF\n",
0944                bus->channel, busnode);
0945     }
0946 }
0947 
0948 #endif /* CONFIG_PMAC_SMU */
0949 
0950 /*
0951  *
0952  * Core code
0953  *
0954  */
0955 
0956 
0957 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
0958 {
0959     struct device_node *p = of_node_get(node);
0960     struct device_node *prev = NULL;
0961     struct pmac_i2c_bus *bus;
0962 
0963     while(p) {
0964         list_for_each_entry(bus, &pmac_i2c_busses, link) {
0965             if (p == bus->busnode) {
0966                 if (prev && bus->flags & pmac_i2c_multibus) {
0967                     const u32 *reg;
0968                     reg = of_get_property(prev, "reg",
0969                                 NULL);
0970                     if (!reg)
0971                         continue;
0972                     if (((*reg) >> 8) != bus->channel)
0973                         continue;
0974                 }
0975                 of_node_put(p);
0976                 of_node_put(prev);
0977                 return bus;
0978             }
0979         }
0980         of_node_put(prev);
0981         prev = p;
0982         p = of_get_parent(p);
0983     }
0984     return NULL;
0985 }
0986 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
0987 
0988 u8 pmac_i2c_get_dev_addr(struct device_node *device)
0989 {
0990     const u32 *reg = of_get_property(device, "reg", NULL);
0991 
0992     if (reg == NULL)
0993         return 0;
0994 
0995     return (*reg) & 0xff;
0996 }
0997 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
0998 
0999 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1000 {
1001     return bus->controller;
1002 }
1003 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1004 
1005 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1006 {
1007     return bus->busnode;
1008 }
1009 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1010 
1011 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1012 {
1013     return bus->type;
1014 }
1015 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1016 
1017 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1018 {
1019     return bus->flags;
1020 }
1021 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1022 
1023 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1024 {
1025     return bus->channel;
1026 }
1027 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1028 
1029 
1030 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1031 {
1032     return &bus->adapter;
1033 }
1034 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1035 
1036 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1037 {
1038     struct pmac_i2c_bus *bus;
1039 
1040     list_for_each_entry(bus, &pmac_i2c_busses, link)
1041         if (&bus->adapter == adapter)
1042             return bus;
1043     return NULL;
1044 }
1045 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1046 
1047 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1048 {
1049     struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1050 
1051     if (bus == NULL)
1052         return 0;
1053     return (&bus->adapter == adapter);
1054 }
1055 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1056 
1057 int pmac_low_i2c_lock(struct device_node *np)
1058 {
1059     struct pmac_i2c_bus *bus, *found = NULL;
1060 
1061     list_for_each_entry(bus, &pmac_i2c_busses, link) {
1062         if (np == bus->controller) {
1063             found = bus;
1064             break;
1065         }
1066     }
1067     if (!found)
1068         return -ENODEV;
1069     return pmac_i2c_open(bus, 0);
1070 }
1071 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1072 
1073 int pmac_low_i2c_unlock(struct device_node *np)
1074 {
1075     struct pmac_i2c_bus *bus, *found = NULL;
1076 
1077     list_for_each_entry(bus, &pmac_i2c_busses, link) {
1078         if (np == bus->controller) {
1079             found = bus;
1080             break;
1081         }
1082     }
1083     if (!found)
1084         return -ENODEV;
1085     pmac_i2c_close(bus);
1086     return 0;
1087 }
1088 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1089 
1090 
1091 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1092 {
1093     int rc;
1094 
1095     mutex_lock(&bus->mutex);
1096     bus->polled = polled || pmac_i2c_force_poll;
1097     bus->opened = 1;
1098     bus->mode = pmac_i2c_mode_std;
1099     if (bus->open && (rc = bus->open(bus)) != 0) {
1100         bus->opened = 0;
1101         mutex_unlock(&bus->mutex);
1102         return rc;
1103     }
1104     return 0;
1105 }
1106 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1107 
1108 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1109 {
1110     WARN_ON(!bus->opened);
1111     if (bus->close)
1112         bus->close(bus);
1113     bus->opened = 0;
1114     mutex_unlock(&bus->mutex);
1115 }
1116 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1117 
1118 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1119 {
1120     WARN_ON(!bus->opened);
1121 
1122     /* Report me if you see the error below as there might be a new
1123      * "combined4" mode that I need to implement for the SMU bus
1124      */
1125     if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1126         printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1127                " bus %pOF !\n", mode, bus->busnode);
1128         return -EINVAL;
1129     }
1130     bus->mode = mode;
1131 
1132     return 0;
1133 }
1134 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1135 
1136 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1137           u32 subaddr, u8 *data, int len)
1138 {
1139     int rc;
1140 
1141     WARN_ON(!bus->opened);
1142 
1143     DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1144         " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1145         subaddr, len, bus->busnode);
1146 
1147     rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1148 
1149 #ifdef DEBUG
1150     if (rc)
1151         DBG("xfer error %d\n", rc);
1152 #endif
1153     return rc;
1154 }
1155 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1156 
1157 /* some quirks for platform function decoding */
1158 enum {
1159     pmac_i2c_quirk_invmask = 0x00000001u,
1160     pmac_i2c_quirk_skip = 0x00000002u,
1161 };
1162 
1163 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1164                           int quirks))
1165 {
1166     struct pmac_i2c_bus *bus;
1167     struct device_node *np;
1168     static struct whitelist_ent {
1169         char *name;
1170         char *compatible;
1171         int quirks;
1172     } whitelist[] = {
1173         /* XXX Study device-tree's & apple drivers are get the quirks
1174          * right !
1175          */
1176         /* Workaround: It seems that running the clockspreading
1177          * properties on the eMac will cause lockups during boot.
1178          * The machine seems to work fine without that. So for now,
1179          * let's make sure i2c-hwclock doesn't match about "imic"
1180          * clocks and we'll figure out if we really need to do
1181          * something special about those later.
1182          */
1183         { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1184         { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1185         { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1186         { "i2c-cpu-voltage", NULL, 0},
1187         {  "temp-monitor", NULL, 0 },
1188         {  "supply-monitor", NULL, 0 },
1189         { NULL, NULL, 0 },
1190     };
1191 
1192     /* Only some devices need to have platform functions instantiated
1193      * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1194      * on Xserve, if we ever do a driver for them, will use their own
1195      * platform function instance
1196      */
1197     list_for_each_entry(bus, &pmac_i2c_busses, link) {
1198         for_each_child_of_node(bus->busnode, np) {
1199             struct whitelist_ent *p;
1200             /* If multibus, check if device is on that bus */
1201             if (bus->flags & pmac_i2c_multibus)
1202                 if (bus != pmac_i2c_find_bus(np))
1203                     continue;
1204             for (p = whitelist; p->name != NULL; p++) {
1205                 if (!of_node_name_eq(np, p->name))
1206                     continue;
1207                 if (p->compatible &&
1208                     !of_device_is_compatible(np, p->compatible))
1209                     continue;
1210                 if (p->quirks & pmac_i2c_quirk_skip)
1211                     break;
1212                 callback(np, p->quirks);
1213                 break;
1214             }
1215         }
1216     }
1217 }
1218 
1219 #define MAX_I2C_DATA    64
1220 
1221 struct pmac_i2c_pf_inst
1222 {
1223     struct pmac_i2c_bus *bus;
1224     u8          addr;
1225     u8          buffer[MAX_I2C_DATA];
1226     u8          scratch[MAX_I2C_DATA];
1227     int         bytes;
1228     int         quirks;
1229 };
1230 
1231 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1232 {
1233     struct pmac_i2c_pf_inst *inst;
1234     struct pmac_i2c_bus *bus;
1235 
1236     bus = pmac_i2c_find_bus(func->node);
1237     if (bus == NULL) {
1238         printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1239                func->node);
1240         return NULL;
1241     }
1242     if (pmac_i2c_open(bus, 0)) {
1243         printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1244                func->node);
1245         return NULL;
1246     }
1247 
1248     /* XXX might need GFP_ATOMIC when called during the suspend process,
1249      * but then, there are already lots of issues with suspending when
1250      * near OOM that need to be resolved, the allocator itself should
1251      * probably make GFP_NOIO implicit during suspend
1252      */
1253     inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1254     if (inst == NULL) {
1255         pmac_i2c_close(bus);
1256         return NULL;
1257     }
1258     inst->bus = bus;
1259     inst->addr = pmac_i2c_get_dev_addr(func->node);
1260     inst->quirks = (int)(long)func->driver_data;
1261     return inst;
1262 }
1263 
1264 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1265 {
1266     struct pmac_i2c_pf_inst *inst = instdata;
1267 
1268     if (inst == NULL)
1269         return;
1270     pmac_i2c_close(inst->bus);
1271     kfree(inst);
1272 }
1273 
1274 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1275 {
1276     struct pmac_i2c_pf_inst *inst = instdata;
1277 
1278     inst->bytes = len;
1279     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1280                  inst->buffer, len);
1281 }
1282 
1283 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1284 {
1285     struct pmac_i2c_pf_inst *inst = instdata;
1286 
1287     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1288                  (u8 *)data, len);
1289 }
1290 
1291 /* This function is used to do the masking & OR'ing for the "rmw" type
1292  * callbacks. Ze should apply the mask and OR in the values in the
1293  * buffer before writing back. The problem is that it seems that
1294  * various darwin drivers implement the mask/or differently, thus
1295  * we need to check the quirks first
1296  */
1297 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1298                   u32 len, const u8 *mask, const u8 *val)
1299 {
1300     int i;
1301 
1302     if (inst->quirks & pmac_i2c_quirk_invmask) {
1303         for (i = 0; i < len; i ++)
1304             inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1305     } else {
1306         for (i = 0; i < len; i ++)
1307             inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1308                 | (val[i] & mask[i]);
1309     }
1310 }
1311 
1312 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1313                u32 totallen, const u8 *maskdata,
1314                const u8 *valuedata)
1315 {
1316     struct pmac_i2c_pf_inst *inst = instdata;
1317 
1318     if (masklen > inst->bytes || valuelen > inst->bytes ||
1319         totallen > inst->bytes || valuelen > masklen)
1320         return -EINVAL;
1321 
1322     pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1323 
1324     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1325                  inst->scratch, totallen);
1326 }
1327 
1328 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1329 {
1330     struct pmac_i2c_pf_inst *inst = instdata;
1331 
1332     inst->bytes = len;
1333     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1334                  inst->buffer, len);
1335 }
1336 
1337 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1338                      const u8 *data)
1339 {
1340     struct pmac_i2c_pf_inst *inst = instdata;
1341 
1342     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1343                  subaddr, (u8 *)data, len);
1344 }
1345 
1346 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1347 {
1348     struct pmac_i2c_pf_inst *inst = instdata;
1349 
1350     return pmac_i2c_setmode(inst->bus, mode);
1351 }
1352 
1353 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1354                    u32 valuelen, u32 totallen, const u8 *maskdata,
1355                    const u8 *valuedata)
1356 {
1357     struct pmac_i2c_pf_inst *inst = instdata;
1358 
1359     if (masklen > inst->bytes || valuelen > inst->bytes ||
1360         totallen > inst->bytes || valuelen > masklen)
1361         return -EINVAL;
1362 
1363     pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1364 
1365     return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1366                  subaddr, inst->scratch, totallen);
1367 }
1368 
1369 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1370                      const u8 *maskdata,
1371                      const u8 *valuedata)
1372 {
1373     struct pmac_i2c_pf_inst *inst = instdata;
1374     int i, match;
1375 
1376     /* Get return value pointer, it's assumed to be a u32 */
1377     if (!args || !args->count || !args->u[0].p)
1378         return -EINVAL;
1379 
1380     /* Check buffer */
1381     if (len > inst->bytes)
1382         return -EINVAL;
1383 
1384     for (i = 0, match = 1; match && i < len; i ++)
1385         if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1386             match = 0;
1387     *args->u[0].p = match;
1388     return 0;
1389 }
1390 
1391 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1392 {
1393     msleep((duration + 999) / 1000);
1394     return 0;
1395 }
1396 
1397 
1398 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1399     .begin          = pmac_i2c_do_begin,
1400     .end            = pmac_i2c_do_end,
1401     .read_i2c       = pmac_i2c_do_read,
1402     .write_i2c      = pmac_i2c_do_write,
1403     .rmw_i2c        = pmac_i2c_do_rmw,
1404     .read_i2c_sub       = pmac_i2c_do_read_sub,
1405     .write_i2c_sub      = pmac_i2c_do_write_sub,
1406     .rmw_i2c_sub        = pmac_i2c_do_rmw_sub,
1407     .set_i2c_mode       = pmac_i2c_do_set_mode,
1408     .mask_and_compare   = pmac_i2c_do_mask_and_comp,
1409     .delay          = pmac_i2c_do_delay,
1410 };
1411 
1412 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1413 {
1414     DBG("dev_create(%pOF)\n", np);
1415 
1416     pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1417                 (void *)(long)quirks);
1418 }
1419 
1420 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1421 {
1422     DBG("dev_create(%pOF)\n", np);
1423 
1424     pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1425 }
1426 
1427 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1428 {
1429     DBG("dev_suspend(%pOF)\n", np);
1430     pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1431 }
1432 
1433 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1434 {
1435     DBG("dev_resume(%pOF)\n", np);
1436     pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1437 }
1438 
1439 void pmac_pfunc_i2c_suspend(void)
1440 {
1441     pmac_i2c_devscan(pmac_i2c_dev_suspend);
1442 }
1443 
1444 void pmac_pfunc_i2c_resume(void)
1445 {
1446     pmac_i2c_devscan(pmac_i2c_dev_resume);
1447 }
1448 
1449 /*
1450  * Initialize us: probe all i2c busses on the machine, instantiate
1451  * busses and platform functions as needed.
1452  */
1453 /* This is non-static as it might be called early by smp code */
1454 int __init pmac_i2c_init(void)
1455 {
1456     static int i2c_inited;
1457 
1458     if (i2c_inited)
1459         return 0;
1460     i2c_inited = 1;
1461 
1462     /* Probe keywest-i2c busses */
1463     kw_i2c_probe();
1464 
1465 #ifdef CONFIG_ADB_PMU
1466     /* Probe PMU i2c busses */
1467     pmu_i2c_probe();
1468 #endif
1469 
1470 #ifdef CONFIG_PMAC_SMU
1471     /* Probe SMU i2c busses */
1472     smu_i2c_probe();
1473 #endif
1474 
1475     /* Now add platform functions for some known devices */
1476     pmac_i2c_devscan(pmac_i2c_dev_create);
1477 
1478     return 0;
1479 }
1480 machine_arch_initcall(powermac, pmac_i2c_init);
1481 
1482 /* Since pmac_i2c_init can be called too early for the platform device
1483  * registration, we need to do it at a later time. In our case, subsys
1484  * happens to fit well, though I agree it's a bit of a hack...
1485  */
1486 static int __init pmac_i2c_create_platform_devices(void)
1487 {
1488     struct pmac_i2c_bus *bus;
1489     int i = 0;
1490 
1491     /* In the case where we are initialized from smp_init(), we must
1492      * not use the timer (and thus the irq). It's safe from now on
1493      * though
1494      */
1495     pmac_i2c_force_poll = 0;
1496 
1497     /* Create platform devices */
1498     list_for_each_entry(bus, &pmac_i2c_busses, link) {
1499         bus->platform_dev =
1500             platform_device_alloc("i2c-powermac", i++);
1501         if (bus->platform_dev == NULL)
1502             return -ENOMEM;
1503         bus->platform_dev->dev.platform_data = bus;
1504         bus->platform_dev->dev.of_node = bus->busnode;
1505         platform_device_add(bus->platform_dev);
1506     }
1507 
1508     /* Now call platform "init" functions */
1509     pmac_i2c_devscan(pmac_i2c_dev_init);
1510 
1511     return 0;
1512 }
1513 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
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