platforms/pasemi/powersave.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2006-2007 PA Semi, Inc
0004  *
0005  * Maintained by: Olof Johansson <olof@lixom.net>
0006  */
0007
0008 #include <asm/processor.h>
0009 #include <asm/page.h>
0010 #include <asm/ppc_asm.h>
0011 #include <asm/cputable.h>
0012 #include <asm/cache.h>
0013 #include <asm/thread_info.h>
0014 #include <asm/asm-offsets.h>
0015
0016 /* Power savings opcodes since not all binutils have them at this time */
0017 #define DOZE    .long   0x4c000324
0018 #define NAP .long   0x4c000364
0019 #define SLEEP   .long   0x4c0003a4
0020 #define RVW .long   0x4c0003e4
0021
0022 /* Common sequence to do before going to any of the
0023  * powersavings modes.
0024  */
0025
0026 #define PRE_SLEEP_SEQUENCE  \
0027     std r3,8(r1);   \
0028     ptesync ;       \
0029     ld  r3,8(r1);   \
0030 1:  cmpd    r3,r3;      \
0031     bne 1b
0032
0033 _doze:
0034     PRE_SLEEP_SEQUENCE
0035     DOZE
0036     b   .
0037
0038
0039 _GLOBAL(idle_spin)
0040     blr
0041
0042 _GLOBAL(idle_doze)
0043     LOAD_REG_ADDR(r3, _doze)
0044     b   sleep_common
0045
0046 /* Add more modes here later */
0047
0048 sleep_common:
0049     mflr    r0
0050     std r0, 16(r1)
0051     stdu    r1,-64(r1)
0052 #ifdef CONFIG_PPC_PASEMI_CPUFREQ
0053     std r3, 48(r1)
0054
0055     /* Only do power savings when in astate 0 */
0056     bl  check_astate
0057     cmpwi   r3,0
0058     bne 1f
0059
0060     ld  r3, 48(r1)
0061 #endif
0062     LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
0063     mfmsr   r4
0064     andc    r5,r4,r6
0065     mtmsrd  r5,0
0066
0067     mtctr   r3
0068     bctrl
0069
0070     mtmsrd  r4,0
0071
0072 1:  addi    r1,r1,64
0073     ld  r0,16(r1)
0074     mtlr    r0
0075     blr
0076