0001
0002
0003
0004
0005
0006
0007
0008
0009 #define DRV_MODULE_NAME "flipper-pic"
0010 #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
0011
0012 #include <linux/kernel.h>
0013 #include <linux/init.h>
0014 #include <linux/irq.h>
0015 #include <linux/irqdomain.h>
0016 #include <linux/of.h>
0017 #include <linux/of_address.h>
0018 #include <asm/io.h>
0019
0020 #include "flipper-pic.h"
0021
0022 #define FLIPPER_NR_IRQS 32
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033 #define FLIPPER_ICR 0x00
0034 #define FLIPPER_ICR_RSS (1<<16)
0035
0036 #define FLIPPER_IMR 0x04
0037
0038 #define FLIPPER_RESET 0x24
0039
0040
0041
0042
0043
0044
0045
0046 static void flipper_pic_mask_and_ack(struct irq_data *d)
0047 {
0048 int irq = irqd_to_hwirq(d);
0049 void __iomem *io_base = irq_data_get_irq_chip_data(d);
0050 u32 mask = 1 << irq;
0051
0052 clrbits32(io_base + FLIPPER_IMR, mask);
0053
0054 out_be32(io_base + FLIPPER_ICR, mask);
0055 }
0056
0057 static void flipper_pic_ack(struct irq_data *d)
0058 {
0059 int irq = irqd_to_hwirq(d);
0060 void __iomem *io_base = irq_data_get_irq_chip_data(d);
0061
0062
0063 out_be32(io_base + FLIPPER_ICR, 1 << irq);
0064 }
0065
0066 static void flipper_pic_mask(struct irq_data *d)
0067 {
0068 int irq = irqd_to_hwirq(d);
0069 void __iomem *io_base = irq_data_get_irq_chip_data(d);
0070
0071 clrbits32(io_base + FLIPPER_IMR, 1 << irq);
0072 }
0073
0074 static void flipper_pic_unmask(struct irq_data *d)
0075 {
0076 int irq = irqd_to_hwirq(d);
0077 void __iomem *io_base = irq_data_get_irq_chip_data(d);
0078
0079 setbits32(io_base + FLIPPER_IMR, 1 << irq);
0080 }
0081
0082
0083 static struct irq_chip flipper_pic = {
0084 .name = "flipper-pic",
0085 .irq_ack = flipper_pic_ack,
0086 .irq_mask_ack = flipper_pic_mask_and_ack,
0087 .irq_mask = flipper_pic_mask,
0088 .irq_unmask = flipper_pic_unmask,
0089 };
0090
0091
0092
0093
0094
0095
0096 static struct irq_domain *flipper_irq_host;
0097
0098 static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
0099 irq_hw_number_t hwirq)
0100 {
0101 irq_set_chip_data(virq, h->host_data);
0102 irq_set_status_flags(virq, IRQ_LEVEL);
0103 irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
0104 return 0;
0105 }
0106
0107 static const struct irq_domain_ops flipper_irq_domain_ops = {
0108 .map = flipper_pic_map,
0109 };
0110
0111
0112
0113
0114
0115
0116 static void __flipper_quiesce(void __iomem *io_base)
0117 {
0118
0119 out_be32(io_base + FLIPPER_IMR, 0x00000000);
0120 out_be32(io_base + FLIPPER_ICR, 0xffffffff);
0121 }
0122
0123 static struct irq_domain * __init flipper_pic_init(struct device_node *np)
0124 {
0125 struct device_node *pi;
0126 struct irq_domain *irq_domain = NULL;
0127 struct resource res;
0128 void __iomem *io_base;
0129 int retval;
0130
0131 pi = of_get_parent(np);
0132 if (!pi) {
0133 pr_err("no parent found\n");
0134 goto out;
0135 }
0136 if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) {
0137 pr_err("unexpected parent compatible\n");
0138 goto out;
0139 }
0140
0141 retval = of_address_to_resource(pi, 0, &res);
0142 if (retval) {
0143 pr_err("no io memory range found\n");
0144 goto out;
0145 }
0146 io_base = ioremap(res.start, resource_size(&res));
0147
0148 pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
0149
0150 __flipper_quiesce(io_base);
0151
0152 irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
0153 &flipper_irq_domain_ops, io_base);
0154 if (!irq_domain) {
0155 pr_err("failed to allocate irq_domain\n");
0156 return NULL;
0157 }
0158
0159 out:
0160 return irq_domain;
0161 }
0162
0163 unsigned int flipper_pic_get_irq(void)
0164 {
0165 void __iomem *io_base = flipper_irq_host->host_data;
0166 int irq;
0167 u32 irq_status;
0168
0169 irq_status = in_be32(io_base + FLIPPER_ICR) &
0170 in_be32(io_base + FLIPPER_IMR);
0171 if (irq_status == 0)
0172 return 0;
0173
0174 irq = __ffs(irq_status);
0175 return irq_linear_revmap(flipper_irq_host, irq);
0176 }
0177
0178
0179
0180
0181
0182
0183 void __init flipper_pic_probe(void)
0184 {
0185 struct device_node *np;
0186
0187 np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic");
0188 BUG_ON(!np);
0189
0190 flipper_irq_host = flipper_pic_init(np);
0191 BUG_ON(!flipper_irq_host);
0192
0193 irq_set_default_host(flipper_irq_host);
0194
0195 of_node_put(np);
0196 }
0197
0198
0199
0200
0201
0202
0203
0204
0205
0206
0207
0208
0209 void flipper_quiesce(void)
0210 {
0211 void __iomem *io_base = flipper_irq_host->host_data;
0212
0213 __flipper_quiesce(io_base);
0214 }
0215
0216
0217
0218
0219 void flipper_platform_reset(void)
0220 {
0221 void __iomem *io_base;
0222
0223 if (flipper_irq_host && flipper_irq_host->host_data) {
0224 io_base = flipper_irq_host->host_data;
0225 out_8(io_base + FLIPPER_RESET, 0x00);
0226 }
0227 }
0228
0229
0230
0231
0232 int flipper_is_reset_button_pressed(void)
0233 {
0234 void __iomem *io_base;
0235 u32 icr;
0236
0237 if (flipper_irq_host && flipper_irq_host->host_data) {
0238 io_base = flipper_irq_host->host_data;
0239 icr = in_be32(io_base + FLIPPER_ICR);
0240 return !(icr & FLIPPER_ICR_RSS);
0241 }
0242 return 0;
0243 }
0244