cell/spufs/spu_restore_crt0.S

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * crt0_r.S: Entry function for SPU-side context restore.
0004  *
0005  * Copyright (C) 2005 IBM
0006  *
0007  * Entry and exit function for SPU-side of the context restore
0008  * sequence.  Sets up an initial stack frame, then branches to
0009  * 'main'.  On return, restores all 128 registers from the LSCSA
0010  * and exits.
0011  */
0012
0013 #include <asm/spu_csa.h>
0014
0015 .data
0016 .align 7
0017 .globl regs_spill
0018 regs_spill:
0019 .space SIZEOF_SPU_SPILL_REGS, 0x0
0020
0021 .text
0022 .global _start
0023 _start:
0024     /* Initialize the stack pointer to point to 16368
0025      * (16kb-16). The back chain pointer is initialized
0026      * to NULL.
0027      */
0028     il      $0, 0
0029     il      $SP, 16368
0030     stqd    $0, 0($SP)
0031
0032     /* Allocate a minimum stack frame for the called main.
0033      * This is needed so that main has a place to save the
0034      * link register when it calls another function.
0035      */
0036     stqd    $SP, -160($SP)
0037     ai      $SP, $SP, -160
0038
0039     /* Call the program's main function. */
0040     brsl    $0, main
0041
0042 .global exit
0043 .global _exit
0044 exit:
0045 _exit:
0046     /* SPU Context Restore, Step 5: Restore the remaining 112 GPRs. */
0047     ila     $3, regs_spill + 256
0048 restore_regs:
0049     lqr     $4, restore_reg_insts
0050 restore_reg_loop:
0051     ai      $4, $4, 4
0052     .balignl 16, 0x40200000
0053 restore_reg_insts:       /* must be quad-word aligned. */
0054     lqd     $16, 0($3)
0055     lqd     $17, 16($3)
0056     lqd     $18, 32($3)
0057     lqd     $19, 48($3)
0058     andi    $5, $4, 0x7F
0059     stqr    $4, restore_reg_insts
0060     ai      $3, $3, 64
0061     brnz    $5, restore_reg_loop
0062
0063     /* SPU Context Restore Step 17: Restore the first 16 GPRs. */
0064     lqa $0, regs_spill + 0
0065     lqa $1, regs_spill + 16
0066     lqa $2, regs_spill + 32
0067     lqa $3, regs_spill + 48
0068     lqa $4, regs_spill + 64
0069     lqa $5, regs_spill + 80
0070     lqa $6, regs_spill + 96
0071     lqa $7, regs_spill + 112
0072     lqa $8, regs_spill + 128
0073     lqa $9, regs_spill + 144
0074     lqa $10, regs_spill + 160
0075     lqa $11, regs_spill + 176
0076     lqa $12, regs_spill + 192
0077     lqa $13, regs_spill + 208
0078     lqa $14, regs_spill + 224
0079     lqa $15, regs_spill + 240
0080
0081     /* Under normal circumstances, the 'exit' function
0082      * terminates with 'stop SPU_RESTORE_COMPLETE',
0083      * indicating that the SPU-side restore code has
0084      * completed.
0085      *
0086      * However it is possible that instructions immediately
0087      * following the 'stop 0x3ffc' have been modified at run
0088      * time so as to recreate the exact SPU_Status settings
0089      * from the application, e.g. illegal instruciton, halt,
0090      * etc.
0091      */
0092 .global exit_fini
0093 .global _exit_fini
0094 exit_fini:
0095 _exit_fini:
0096     stop    SPU_RESTORE_COMPLETE
0097     stop    0
0098     stop    0
0099     stop    0
0100
0101     /* Pad the size of this crt0.o to be multiple of 16 bytes. */
0102 .balignl 16, 0x0