cell/spufs/fault.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Low-level SPU handling
0004  *
0005  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
0006  *
0007  * Author: Arnd Bergmann <arndb@de.ibm.com>
0008  */
0009 #include <linux/sched/signal.h>
0010 #include <linux/mm.h>
0011
0012 #include <asm/spu.h>
0013 #include <asm/spu_csa.h>
0014
0015 #include "spufs.h"
0016
0017 /**
0018  * Handle an SPE event, depending on context SPU_CREATE_EVENTS_ENABLED flag.
0019  *
0020  * If the context was created with events, we just set the return event.
0021  * Otherwise, send an appropriate signal to the process.
0022  */
0023 static void spufs_handle_event(struct spu_context *ctx,
0024                 unsigned long ea, int type)
0025 {
0026     if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
0027         ctx->event_return |= type;
0028         wake_up_all(&ctx->stop_wq);
0029         return;
0030     }
0031
0032     switch (type) {
0033     case SPE_EVENT_INVALID_DMA:
0034         force_sig_fault(SIGBUS, BUS_OBJERR, NULL);
0035         break;
0036     case SPE_EVENT_SPE_DATA_STORAGE:
0037         ctx->ops->restart_dma(ctx);
0038         force_sig_fault(SIGSEGV, SEGV_ACCERR, (void __user *)ea);
0039         break;
0040     case SPE_EVENT_DMA_ALIGNMENT:
0041         /* DAR isn't set for an alignment fault :( */
0042         force_sig_fault(SIGBUS, BUS_ADRALN, NULL);
0043         break;
0044     case SPE_EVENT_SPE_ERROR:
0045         force_sig_fault(
0046             SIGILL, ILL_ILLOPC,
0047             (void __user *)(unsigned long)
0048             ctx->ops->npc_read(ctx) - 4);
0049         break;
0050     }
0051 }
0052
0053 int spufs_handle_class0(struct spu_context *ctx)
0054 {
0055     unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;
0056
0057     if (likely(!stat))
0058         return 0;
0059
0060     if (stat & CLASS0_DMA_ALIGNMENT_INTR)
0061         spufs_handle_event(ctx, ctx->csa.class_0_dar,
0062             SPE_EVENT_DMA_ALIGNMENT);
0063
0064     if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
0065         spufs_handle_event(ctx, ctx->csa.class_0_dar,
0066             SPE_EVENT_INVALID_DMA);
0067
0068     if (stat & CLASS0_SPU_ERROR_INTR)
0069         spufs_handle_event(ctx, ctx->csa.class_0_dar,
0070             SPE_EVENT_SPE_ERROR);
0071
0072     ctx->csa.class_0_pending = 0;
0073
0074     return -EIO;
0075 }
0076
0077 /*
0078  * bottom half handler for page faults, we can't do this from
0079  * interrupt context, since we might need to sleep.
0080  * we also need to give up the mutex so we can get scheduled
0081  * out while waiting for the backing store.
0082  *
0083  * TODO: try calling hash_page from the interrupt handler first
0084  *       in order to speed up the easy case.
0085  */
0086 int spufs_handle_class1(struct spu_context *ctx)
0087 {
0088     u64 ea, dsisr, access;
0089     unsigned long flags;
0090     vm_fault_t flt = 0;
0091     int ret;
0092
0093     /*
0094      * dar and dsisr get passed from the registers
0095      * to the spu_context, to this function, but not
0096      * back to the spu if it gets scheduled again.
0097      *
0098      * if we don't handle the fault for a saved context
0099      * in time, we can still expect to get the same fault
0100      * the immediately after the context restore.
0101      */
0102     ea = ctx->csa.class_1_dar;
0103     dsisr = ctx->csa.class_1_dsisr;
0104
0105     if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
0106         return 0;
0107
0108     spuctx_switch_state(ctx, SPU_UTIL_IOWAIT);
0109
0110     pr_debug("ctx %p: ea %016llx, dsisr %016llx state %d\n", ctx, ea,
0111         dsisr, ctx->state);
0112
0113     ctx->stats.hash_flt++;
0114     if (ctx->state == SPU_STATE_RUNNABLE)
0115         ctx->spu->stats.hash_flt++;
0116
0117     /* we must not hold the lock when entering copro_handle_mm_fault */
0118     spu_release(ctx);
0119
0120     access = (_PAGE_PRESENT | _PAGE_READ);
0121     access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_WRITE : 0UL;
0122     local_irq_save(flags);
0123     ret = hash_page(ea, access, 0x300, dsisr);
0124     local_irq_restore(flags);
0125
0126     /* hashing failed, so try the actual fault handler */
0127     if (ret)
0128         ret = copro_handle_mm_fault(current->mm, ea, dsisr, &flt);
0129
0130     /*
0131      * This is nasty: we need the state_mutex for all the bookkeeping even
0132      * if the syscall was interrupted by a signal. ewww.
0133      */
0134     mutex_lock(&ctx->state_mutex);
0135
0136     /*
0137      * Clear dsisr under ctxt lock after handling the fault, so that
0138      * time slicing will not preempt the context while the page fault
0139      * handler is running. Context switch code removes mappings.
0140      */
0141     ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
0142
0143     /*
0144      * If we handled the fault successfully and are in runnable
0145      * state, restart the DMA.
0146      * In case of unhandled error report the problem to user space.
0147      */
0148     if (!ret) {
0149         if (flt & VM_FAULT_MAJOR)
0150             ctx->stats.maj_flt++;
0151         else
0152             ctx->stats.min_flt++;
0153         if (ctx->state == SPU_STATE_RUNNABLE) {
0154             if (flt & VM_FAULT_MAJOR)
0155                 ctx->spu->stats.maj_flt++;
0156             else
0157                 ctx->spu->stats.min_flt++;
0158         }
0159
0160         if (ctx->spu)
0161             ctx->ops->restart_dma(ctx);
0162     } else
0163         spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
0164
0165     spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
0166     return ret;
0167 }