platforms/8xx/pic.c

0001 #include <linux/kernel.h>
0002 #include <linux/stddef.h>
0003 #include <linux/sched.h>
0004 #include <linux/signal.h>
0005 #include <linux/irq.h>
0006 #include <linux/dma-mapping.h>
0007 #include <linux/of_address.h>
0008 #include <linux/of_irq.h>
0009 #include <asm/irq.h>
0010 #include <asm/io.h>
0011 #include <asm/8xx_immap.h>
0012
0013 #include "pic.h"
0014
0015
0016 #define PIC_VEC_SPURRIOUS      15
0017
0018 static struct irq_domain *mpc8xx_pic_host;
0019 static unsigned long mpc8xx_cached_irq_mask;
0020 static sysconf8xx_t __iomem *siu_reg;
0021
0022 static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
0023 {
0024     return 0x80000000 >> irqd_to_hwirq(d);
0025 }
0026
0027 static void mpc8xx_unmask_irq(struct irq_data *d)
0028 {
0029     mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
0030     out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
0031 }
0032
0033 static void mpc8xx_mask_irq(struct irq_data *d)
0034 {
0035     mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
0036     out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
0037 }
0038
0039 static void mpc8xx_ack(struct irq_data *d)
0040 {
0041     out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
0042 }
0043
0044 static void mpc8xx_end_irq(struct irq_data *d)
0045 {
0046     mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
0047     out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
0048 }
0049
0050 static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
0051 {
0052     /* only external IRQ senses are programmable */
0053     if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
0054         unsigned int siel = in_be32(&siu_reg->sc_siel);
0055         siel |= mpc8xx_irqd_to_bit(d);
0056         out_be32(&siu_reg->sc_siel, siel);
0057         irq_set_handler_locked(d, handle_edge_irq);
0058     }
0059     return 0;
0060 }
0061
0062 static struct irq_chip mpc8xx_pic = {
0063     .name = "8XX SIU",
0064     .irq_unmask = mpc8xx_unmask_irq,
0065     .irq_mask = mpc8xx_mask_irq,
0066     .irq_ack = mpc8xx_ack,
0067     .irq_eoi = mpc8xx_end_irq,
0068     .irq_set_type = mpc8xx_set_irq_type,
0069 };
0070
0071 unsigned int mpc8xx_get_irq(void)
0072 {
0073     int irq;
0074
0075     /* For MPC8xx, read the SIVEC register and shift the bits down
0076      * to get the irq number.
0077      */
0078     irq = in_be32(&siu_reg->sc_sivec) >> 26;
0079
0080     if (irq == PIC_VEC_SPURRIOUS)
0081         return 0;
0082
0083         return irq_linear_revmap(mpc8xx_pic_host, irq);
0084
0085 }
0086
0087 static int mpc8xx_pic_host_map(struct irq_domain *h, unsigned int virq,
0088               irq_hw_number_t hw)
0089 {
0090     pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
0091
0092     /* Set default irq handle */
0093     irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
0094     return 0;
0095 }
0096
0097
0098 static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
0099                 const u32 *intspec, unsigned int intsize,
0100                 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
0101 {
0102     static unsigned char map_pic_senses[4] = {
0103         IRQ_TYPE_EDGE_RISING,
0104         IRQ_TYPE_LEVEL_LOW,
0105         IRQ_TYPE_LEVEL_HIGH,
0106         IRQ_TYPE_EDGE_FALLING,
0107     };
0108
0109     if (intspec[0] > 0x1f)
0110         return 0;
0111
0112     *out_hwirq = intspec[0];
0113     if (intsize > 1 && intspec[1] < 4)
0114         *out_flags = map_pic_senses[intspec[1]];
0115     else
0116         *out_flags = IRQ_TYPE_NONE;
0117
0118     return 0;
0119 }
0120
0121
0122 static const struct irq_domain_ops mpc8xx_pic_host_ops = {
0123     .map = mpc8xx_pic_host_map,
0124     .xlate = mpc8xx_pic_host_xlate,
0125 };
0126
0127 void __init mpc8xx_pic_init(void)
0128 {
0129     struct resource res;
0130     struct device_node *np;
0131     int ret;
0132
0133     np = of_find_compatible_node(NULL, NULL, "fsl,pq1-pic");
0134     if (np == NULL)
0135         np = of_find_node_by_type(NULL, "mpc8xx-pic");
0136     if (np == NULL) {
0137         printk(KERN_ERR "Could not find fsl,pq1-pic node\n");
0138         return;
0139     }
0140
0141     ret = of_address_to_resource(np, 0, &res);
0142     if (ret)
0143         goto out;
0144
0145     siu_reg = ioremap(res.start, resource_size(&res));
0146     if (!siu_reg)
0147         goto out;
0148
0149     mpc8xx_pic_host = irq_domain_add_linear(np, 64, &mpc8xx_pic_host_ops, NULL);
0150     if (!mpc8xx_pic_host)
0151         printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
0152
0153 out:
0154     of_node_put(np);
0155 }