platforms/8xx/ep88xc.c

0001 /*
0002  * Platform setup for the Embedded Planet EP88xC board
0003  *
0004  * Author: Scott Wood <scottwood@freescale.com>
0005  * Copyright 2007 Freescale Semiconductor, Inc.
0006  *
0007  * This file is licensed under the terms of the GNU General Public License
0008  * version 2. This program is licensed "as is" without any warranty of any
0009  * kind, whether express or implied.
0010  */
0011
0012 #include <linux/init.h>
0013 #include <linux/of_address.h>
0014 #include <linux/of_fdt.h>
0015 #include <linux/of_platform.h>
0016
0017 #include <asm/machdep.h>
0018 #include <asm/io.h>
0019 #include <asm/udbg.h>
0020 #include <asm/cpm1.h>
0021
0022 #include "mpc8xx.h"
0023 #include "pic.h"
0024
0025 struct cpm_pin {
0026     int port, pin, flags;
0027 };
0028
0029 static struct cpm_pin ep88xc_pins[] = {
0030     /* SMC1 */
0031     {1, 24, CPM_PIN_INPUT}, /* RX */
0032     {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
0033
0034     /* SCC2 */
0035     {0, 12, CPM_PIN_INPUT}, /* TX */
0036     {0, 13, CPM_PIN_INPUT}, /* RX */
0037     {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
0038     {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
0039     {2, 14, CPM_PIN_INPUT}, /* RTS */
0040
0041     /* MII1 */
0042     {0, 0, CPM_PIN_INPUT},
0043     {0, 1, CPM_PIN_INPUT},
0044     {0, 2, CPM_PIN_INPUT},
0045     {0, 3, CPM_PIN_INPUT},
0046     {0, 4, CPM_PIN_OUTPUT},
0047     {0, 10, CPM_PIN_OUTPUT},
0048     {0, 11, CPM_PIN_OUTPUT},
0049     {1, 19, CPM_PIN_INPUT},
0050     {1, 31, CPM_PIN_INPUT},
0051     {2, 12, CPM_PIN_INPUT},
0052     {2, 13, CPM_PIN_INPUT},
0053     {3, 8, CPM_PIN_INPUT},
0054     {4, 30, CPM_PIN_OUTPUT},
0055     {4, 31, CPM_PIN_OUTPUT},
0056
0057     /* MII2 */
0058     {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0059     {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0060     {4, 16, CPM_PIN_OUTPUT},
0061     {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0062     {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0063     {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0064     {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0065     {4, 21, CPM_PIN_OUTPUT},
0066     {4, 22, CPM_PIN_OUTPUT},
0067     {4, 23, CPM_PIN_OUTPUT},
0068     {4, 24, CPM_PIN_OUTPUT},
0069     {4, 25, CPM_PIN_OUTPUT},
0070     {4, 26, CPM_PIN_OUTPUT},
0071     {4, 27, CPM_PIN_OUTPUT},
0072     {4, 28, CPM_PIN_OUTPUT},
0073     {4, 29, CPM_PIN_OUTPUT},
0074
0075     /* USB */
0076     {0, 6, CPM_PIN_INPUT},  /* CLK2 */
0077     {0, 14, CPM_PIN_INPUT}, /* USBOE */
0078     {0, 15, CPM_PIN_INPUT}, /* USBRXD */
0079     {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
0080     {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
0081     {2, 10, CPM_PIN_INPUT}, /* USBRXN */
0082     {2, 11, CPM_PIN_INPUT}, /* USBRXP */
0083
0084     /* Misc */
0085     {1, 26, CPM_PIN_INPUT}, /* BRGO2 */
0086     {1, 27, CPM_PIN_INPUT}, /* BRGO1 */
0087 };
0088
0089 static void __init init_ioports(void)
0090 {
0091     int i;
0092
0093     for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
0094         struct cpm_pin *pin = &ep88xc_pins[i];
0095         cpm1_set_pin(pin->port, pin->pin, pin->flags);
0096     }
0097
0098     cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
0099     cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
0100     cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
0101     cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
0102     cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
0103 }
0104
0105 static u8 __iomem *ep88xc_bcsr;
0106
0107 #define BCSR7_SCC2_ENABLE 0x10
0108
0109 #define BCSR8_PHY1_ENABLE 0x80
0110 #define BCSR8_PHY1_POWER  0x40
0111 #define BCSR8_PHY2_ENABLE 0x20
0112 #define BCSR8_PHY2_POWER  0x10
0113
0114 #define BCSR9_USB_ENABLE  0x80
0115 #define BCSR9_USB_POWER   0x40
0116 #define BCSR9_USB_HOST    0x20
0117 #define BCSR9_USB_FULL_SPEED_TARGET 0x10
0118
0119 static void __init ep88xc_setup_arch(void)
0120 {
0121     struct device_node *np;
0122
0123     cpm_reset();
0124     init_ioports();
0125
0126     np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
0127     if (!np) {
0128         printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
0129         return;
0130     }
0131
0132     ep88xc_bcsr = of_iomap(np, 0);
0133     of_node_put(np);
0134
0135     if (!ep88xc_bcsr) {
0136         printk(KERN_CRIT "Could not remap BCSR\n");
0137         return;
0138     }
0139
0140     setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
0141     setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
0142                               BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
0143 }
0144
0145 static int __init ep88xc_probe(void)
0146 {
0147     return of_machine_is_compatible("fsl,ep88xc");
0148 }
0149
0150 static const struct of_device_id of_bus_ids[] __initconst = {
0151     { .name = "soc", },
0152     { .name = "cpm", },
0153     { .name = "localbus", },
0154     {},
0155 };
0156
0157 static int __init declare_of_platform_devices(void)
0158 {
0159     /* Publish the QE devices */
0160     of_platform_bus_probe(NULL, of_bus_ids, NULL);
0161
0162     return 0;
0163 }
0164 machine_device_initcall(ep88xc, declare_of_platform_devices);
0165
0166 define_machine(ep88xc) {
0167     .name = "Embedded Planet EP88xC",
0168     .probe = ep88xc_probe,
0169     .setup_arch = ep88xc_setup_arch,
0170     .init_IRQ = mpc8xx_pic_init,
0171     .get_irq    = mpc8xx_get_irq,
0172     .restart = mpc8xx_restart,
0173     .calibrate_decr = mpc8xx_calibrate_decr,
0174     .progress = udbg_progress,
0175 };