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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: GPL-2.0
0002 config CPM1
0003         bool
0004         select CPM
0005 
0006 choice
0007         prompt "8xx Machine Type"
0008         depends on PPC_8xx
0009         default MPC885ADS
0010 
0011 config MPC8XXFADS
0012         bool "FADS"
0013 
0014 config MPC86XADS
0015         bool "MPC86XADS"
0016         select CPM1
0017         help
0018           MPC86x Application Development System by Freescale Semiconductor.
0019           The MPC86xADS is meant to serve as a platform for s/w and h/w
0020           development around the MPC86X processor families.
0021 
0022 config MPC885ADS
0023         bool "MPC885ADS"
0024         select CPM1
0025         select OF_DYNAMIC
0026         help
0027           Freescale Semiconductor MPC885 Application Development System (ADS).
0028           Also known as DUET.
0029           The MPC885ADS is meant to serve as a platform for s/w and h/w
0030           development around the MPC885 processor family.
0031 
0032 config PPC_EP88XC
0033         bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
0034         select CPM1
0035         help
0036           This enables support for the Embedded Planet EP88xC board.
0037 
0038           This board is also resold by Freescale as the QUICCStart
0039           MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
0040 
0041 config PPC_ADDER875
0042         bool "Analogue & Micro Adder 875"
0043         select CPM1
0044         help
0045           This enables support for the Analogue & Micro Adder 875
0046           board.
0047 
0048 config TQM8XX
0049         bool "TQM8XX"
0050         select CPM1
0051         help
0052           support for the mpc8xx based boards from TQM.
0053 
0054 endchoice
0055 
0056 menu "Freescale Ethernet driver platform-specific options"
0057         depends on (FS_ENET && MPC885ADS)
0058 
0059         config MPC8xx_SECOND_ETH
0060         bool "Second Ethernet channel"
0061         depends on MPC885ADS
0062         default y
0063         help
0064           This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
0065           The latter will use SCC1, for 885ADS you can select it below.
0066 
0067         choice
0068                 prompt "Second Ethernet channel"
0069                 depends on MPC8xx_SECOND_ETH
0070                 default MPC8xx_SECOND_ETH_FEC2
0071 
0072                 config MPC8xx_SECOND_ETH_FEC2
0073                 bool "FEC2"
0074                 depends on MPC885ADS
0075                 help
0076                   Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
0077                   (often 2-nd UART) will not work if this is enabled.
0078 
0079                 config MPC8xx_SECOND_ETH_SCC3
0080                 bool "SCC3"
0081                 depends on MPC885ADS
0082                 help
0083                   Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
0084                   (often 1-nd UART) will not work if this is enabled.
0085 
0086         endchoice
0087 
0088 endmenu
0089 
0090 #
0091 # MPC8xx Communication options
0092 #
0093 
0094 menu "MPC8xx CPM Options"
0095         depends on PPC_8xx
0096 
0097 # This doesn't really belong here, but it is convenient to ask
0098 # 8xx specific questions.
0099 comment "Generic MPC8xx Options"
0100 
0101 config 8xx_GPIO
0102         bool "GPIO API Support"
0103         select GPIOLIB
0104         help
0105           Saying Y here will cause the ports on an MPC8xx processor to be used
0106           with the GPIO API.  If you say N here, the kernel needs less memory.
0107 
0108           If in doubt, say Y here.
0109 
0110 config 8xx_CPU15
0111         bool "CPU15 Silicon Errata"
0112         depends on !HUGETLB_PAGE
0113         default y
0114         help
0115           This enables a workaround for erratum CPU15 on MPC8xx chips.
0116           This bug can cause incorrect code execution under certain
0117           circumstances.  This workaround adds some overhead (a TLB miss
0118           every time execution crosses a page boundary), and you may wish
0119           to disable it if you have worked around the bug in the compiler
0120           (by not placing conditional branches or branches to LR or CTR
0121           in the last word of a page, with a target of the last cache
0122           line in the next page), or if you have used some other
0123           workaround.
0124 
0125           If in doubt, say Y here.
0126 
0127 choice
0128         prompt "Microcode patch selection"
0129         default NO_UCODE_PATCH
0130         help
0131           Help not implemented yet, coming soon.
0132 
0133 config NO_UCODE_PATCH
0134         bool "None"
0135 
0136 config USB_SOF_UCODE_PATCH
0137         bool "USB SOF patch"
0138         help
0139           Help not implemented yet, coming soon.
0140 
0141 config I2C_SPI_UCODE_PATCH
0142         bool "I2C/SPI relocation patch"
0143         help
0144           Help not implemented yet, coming soon.
0145 
0146 config I2C_SPI_SMC1_UCODE_PATCH
0147         bool "I2C/SPI/SMC1 relocation patch"
0148         help
0149           Help not implemented yet, coming soon.
0150 
0151 config SMC_UCODE_PATCH
0152         bool "SMC relocation patch"
0153         help
0154           This microcode relocates SMC1 and SMC2 parameter RAMs at
0155           offset 0x1ec0 and 0x1fc0 to allow extended parameter RAM
0156           for SCC3 and SCC4.
0157 
0158 endchoice
0159 
0160 config UCODE_PATCH
0161         bool
0162         default y
0163         depends on !NO_UCODE_PATCH
0164 
0165 menu "8xx advanced setup"
0166         depends on PPC_8xx
0167 
0168 config PIN_TLB
0169         bool "Pinned Kernel TLBs"
0170         depends on ADVANCED_OPTIONS
0171         help
0172           On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each
0173           table 4 TLBs can be pinned.
0174 
0175           It reduces the amount of usable TLBs to 28 (ie by 12%). That's the
0176           reason why we make it selectable.
0177 
0178           This option does nothing, it just activate the selection of what
0179           to pin.
0180 
0181 config PIN_TLB_DATA
0182         bool "Pinned TLB for DATA"
0183         depends on PIN_TLB
0184         default y
0185         help
0186           This pins the first 32 Mbytes of memory with 8M pages.
0187 
0188 config PIN_TLB_IMMR
0189         bool "Pinned TLB for IMMR"
0190         depends on PIN_TLB
0191         default y
0192         help
0193           This pins the IMMR area with a 512kbytes page. In case
0194           CONFIG_PIN_TLB_DATA is also selected, it will reduce
0195           CONFIG_PIN_TLB_DATA to 24 Mbytes.
0196 
0197 endmenu
0198 
0199 endmenu