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0011 #include <linux/stddef.h>
0012 #include <linux/kernel.h>
0013 #include <linux/pci.h>
0014 #include <linux/kdev_t.h>
0015 #include <linux/delay.h>
0016 #include <linux/seq_file.h>
0017 #include <linux/of_platform.h>
0018
0019 #include <asm/time.h>
0020 #include <asm/machdep.h>
0021 #include <asm/pci-bridge.h>
0022 #include <mm/mmu_decl.h>
0023 #include <asm/udbg.h>
0024 #include <asm/swiotlb.h>
0025
0026 #include <asm/mpic.h>
0027
0028 #include <sysdev/fsl_pci.h>
0029 #include <sysdev/fsl_soc.h>
0030
0031 #include "mpc86xx.h"
0032
0033 #undef DEBUG
0034
0035 #ifdef DEBUG
0036 #define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
0037 #else
0038 #define DBG(fmt...) do { } while(0)
0039 #endif
0040
0041 #ifdef CONFIG_PCI
0042 extern int uli_exclude_device(struct pci_controller *hose,
0043 u_char bus, u_char devfn);
0044
0045 static int mpc86xx_exclude_device(struct pci_controller *hose,
0046 u_char bus, u_char devfn)
0047 {
0048 if (hose->dn == fsl_pci_primary)
0049 return uli_exclude_device(hose, bus, devfn);
0050
0051 return PCIBIOS_SUCCESSFUL;
0052 }
0053 #endif
0054
0055
0056 static void __init
0057 mpc86xx_hpcn_setup_arch(void)
0058 {
0059 if (ppc_md.progress)
0060 ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
0061
0062 #ifdef CONFIG_PCI
0063 ppc_md.pci_exclude_device = mpc86xx_exclude_device;
0064 #endif
0065
0066 printk("MPC86xx HPCN board from Freescale Semiconductor\n");
0067
0068 #ifdef CONFIG_SMP
0069 mpc86xx_smp_init();
0070 #endif
0071
0072 fsl_pci_assign_primary();
0073
0074 swiotlb_detect_4g();
0075 }
0076
0077
0078 static void
0079 mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
0080 {
0081 uint svid = mfspr(SPRN_SVR);
0082
0083 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
0084
0085 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
0086 }
0087
0088
0089
0090
0091
0092 static int __init mpc86xx_hpcn_probe(void)
0093 {
0094 if (of_machine_is_compatible("fsl,mpc8641hpcn"))
0095 return 1;
0096
0097 return 0;
0098 }
0099
0100 static const struct of_device_id of_bus_ids[] __initconst = {
0101 { .compatible = "fsl,srio", },
0102 {},
0103 };
0104
0105 static int __init declare_of_platform_devices(void)
0106 {
0107 mpc86xx_common_publish_devices();
0108 of_platform_bus_probe(NULL, of_bus_ids, NULL);
0109
0110 return 0;
0111 }
0112 machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
0113
0114 define_machine(mpc86xx_hpcn) {
0115 .name = "MPC86xx HPCN",
0116 .probe = mpc86xx_hpcn_probe,
0117 .setup_arch = mpc86xx_hpcn_setup_arch,
0118 .init_IRQ = mpc86xx_init_irq,
0119 .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
0120 .get_irq = mpic_get_irq,
0121 .time_init = mpc86xx_time_init,
0122 .calibrate_decr = generic_calibrate_decr,
0123 .progress = udbg_progress,
0124 #ifdef CONFIG_PCI
0125 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
0126 #endif
0127 };