platforms/86xx/gef_sbc310.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * GE SBC310 board support
0004  *
0005  * Author: Martyn Welch <martyn.welch@ge.com>
0006  *
0007  * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
0008  *
0009  * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
0010  * Copyright 2006 Freescale Semiconductor Inc.
0011  *
0012  * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
0013  */
0014
0015 #include <linux/stddef.h>
0016 #include <linux/kernel.h>
0017 #include <linux/pci.h>
0018 #include <linux/kdev_t.h>
0019 #include <linux/delay.h>
0020 #include <linux/seq_file.h>
0021 #include <linux/of_address.h>
0022 #include <linux/of_platform.h>
0023
0024 #include <asm/time.h>
0025 #include <asm/machdep.h>
0026 #include <asm/pci-bridge.h>
0027 #include <mm/mmu_decl.h>
0028 #include <asm/udbg.h>
0029
0030 #include <asm/mpic.h>
0031 #include <asm/nvram.h>
0032
0033 #include <sysdev/fsl_pci.h>
0034 #include <sysdev/fsl_soc.h>
0035 #include <sysdev/ge/ge_pic.h>
0036
0037 #include "mpc86xx.h"
0038
0039 #undef DEBUG
0040
0041 #ifdef DEBUG
0042 #define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
0043 #else
0044 #define DBG (fmt...) do { } while (0)
0045 #endif
0046
0047 void __iomem *sbc310_regs;
0048
0049 static void __init gef_sbc310_init_irq(void)
0050 {
0051     struct device_node *cascade_node = NULL;
0052
0053     mpc86xx_init_irq();
0054
0055     /*
0056      * There is a simple interrupt handler in the main FPGA, this needs
0057      * to be cascaded into the MPIC
0058      */
0059     cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
0060     if (!cascade_node) {
0061         printk(KERN_WARNING "SBC310: No FPGA PIC\n");
0062         return;
0063     }
0064
0065     gef_pic_init(cascade_node);
0066     of_node_put(cascade_node);
0067 }
0068
0069 static void __init gef_sbc310_setup_arch(void)
0070 {
0071     struct device_node *regs;
0072     printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
0073
0074 #ifdef CONFIG_SMP
0075     mpc86xx_smp_init();
0076 #endif
0077
0078     fsl_pci_assign_primary();
0079
0080     /* Remap basic board registers */
0081     regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
0082     if (regs) {
0083         sbc310_regs = of_iomap(regs, 0);
0084         if (sbc310_regs == NULL)
0085             printk(KERN_WARNING "Unable to map board registers\n");
0086         of_node_put(regs);
0087     }
0088
0089 #if defined(CONFIG_MMIO_NVRAM)
0090     mmio_nvram_init();
0091 #endif
0092 }
0093
0094 /* Return the PCB revision */
0095 static unsigned int gef_sbc310_get_board_id(void)
0096 {
0097     unsigned int reg;
0098
0099     reg = ioread32(sbc310_regs);
0100     return reg & 0xff;
0101 }
0102
0103 /* Return the PCB revision */
0104 static unsigned int gef_sbc310_get_pcb_rev(void)
0105 {
0106     unsigned int reg;
0107
0108     reg = ioread32(sbc310_regs);
0109     return (reg >> 8) & 0xff;
0110 }
0111
0112 /* Return the board (software) revision */
0113 static unsigned int gef_sbc310_get_board_rev(void)
0114 {
0115     unsigned int reg;
0116
0117     reg = ioread32(sbc310_regs);
0118     return (reg >> 16) & 0xff;
0119 }
0120
0121 /* Return the FPGA revision */
0122 static unsigned int gef_sbc310_get_fpga_rev(void)
0123 {
0124     unsigned int reg;
0125
0126     reg = ioread32(sbc310_regs);
0127     return (reg >> 24) & 0xf;
0128 }
0129
0130 static void gef_sbc310_show_cpuinfo(struct seq_file *m)
0131 {
0132     uint svid = mfspr(SPRN_SVR);
0133
0134     seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
0135
0136     seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
0137     seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
0138         ('A' + gef_sbc310_get_board_rev() - 1));
0139     seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
0140
0141     seq_printf(m, "SVR\t\t: 0x%x\n", svid);
0142
0143 }
0144
0145 static void gef_sbc310_nec_fixup(struct pci_dev *pdev)
0146 {
0147     unsigned int val;
0148
0149     /* Do not do the fixup on other platforms! */
0150     if (!machine_is(gef_sbc310))
0151         return;
0152
0153     printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
0154
0155     /* Ensure only ports 1 & 2 are enabled */
0156     pci_read_config_dword(pdev, 0xe0, &val);
0157     pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
0158
0159     /* System clock is 48-MHz Oscillator and EHCI Enabled. */
0160     pci_write_config_dword(pdev, 0xe4, 1 << 5);
0161 }
0162 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
0163     gef_sbc310_nec_fixup);
0164
0165 /*
0166  * Called very early, device-tree isn't unflattened
0167  *
0168  * This function is called to determine whether the BSP is compatible with the
0169  * supplied device-tree, which is assumed to be the correct one for the actual
0170  * board. It is expected that, in the future, a kernel may support multiple
0171  * boards.
0172  */
0173 static int __init gef_sbc310_probe(void)
0174 {
0175     if (of_machine_is_compatible("gef,sbc310"))
0176         return 1;
0177
0178     return 0;
0179 }
0180
0181 machine_arch_initcall(gef_sbc310, mpc86xx_common_publish_devices);
0182
0183 define_machine(gef_sbc310) {
0184     .name           = "GE SBC310",
0185     .probe          = gef_sbc310_probe,
0186     .setup_arch     = gef_sbc310_setup_arch,
0187     .init_IRQ       = gef_sbc310_init_irq,
0188     .show_cpuinfo       = gef_sbc310_show_cpuinfo,
0189     .get_irq        = mpic_get_irq,
0190     .time_init      = mpc86xx_time_init,
0191     .calibrate_decr     = generic_calibrate_decr,
0192     .progress       = udbg_progress,
0193 #ifdef CONFIG_PCI
0194     .pcibios_fixup_bus  = fsl_pcibios_fixup_bus,
0195 #endif
0196 };