platforms/85xx/tqm85xx.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Based on MPC8560 ADS and arch/ppc tqm85xx ports
0004  *
0005  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
0006  *
0007  * Copyright 2008 Freescale Semiconductor Inc.
0008  *
0009  * Copyright (c) 2005-2006 DENX Software Engineering
0010  * Stefan Roese <sr@denx.de>
0011  *
0012  * Based on original work by
0013  *  Kumar Gala <kumar.gala@freescale.com>
0014  *      Copyright 2004 Freescale Semiconductor Inc.
0015  */
0016
0017 #include <linux/stddef.h>
0018 #include <linux/kernel.h>
0019 #include <linux/pci.h>
0020 #include <linux/kdev_t.h>
0021 #include <linux/delay.h>
0022 #include <linux/seq_file.h>
0023 #include <linux/of_platform.h>
0024
0025 #include <asm/time.h>
0026 #include <asm/machdep.h>
0027 #include <asm/pci-bridge.h>
0028 #include <asm/mpic.h>
0029 #include <mm/mmu_decl.h>
0030 #include <asm/udbg.h>
0031
0032 #include <sysdev/fsl_soc.h>
0033 #include <sysdev/fsl_pci.h>
0034
0035 #include "mpc85xx.h"
0036
0037 #ifdef CONFIG_CPM2
0038 #include <asm/cpm2.h>
0039 #endif /* CONFIG_CPM2 */
0040
0041 static void __init tqm85xx_pic_init(void)
0042 {
0043     struct mpic *mpic = mpic_alloc(NULL, 0,
0044             MPIC_BIG_ENDIAN,
0045             0, 256, " OpenPIC  ");
0046     BUG_ON(mpic == NULL);
0047     mpic_init(mpic);
0048
0049     mpc85xx_cpm2_pic_init();
0050 }
0051
0052 /*
0053  * Setup the architecture
0054  */
0055 static void __init tqm85xx_setup_arch(void)
0056 {
0057     if (ppc_md.progress)
0058         ppc_md.progress("tqm85xx_setup_arch()", 0);
0059
0060 #ifdef CONFIG_CPM2
0061     cpm2_reset();
0062 #endif
0063
0064     fsl_pci_assign_primary();
0065 }
0066
0067 static void tqm85xx_show_cpuinfo(struct seq_file *m)
0068 {
0069     uint pvid, svid, phid1;
0070
0071     pvid = mfspr(SPRN_PVR);
0072     svid = mfspr(SPRN_SVR);
0073
0074     seq_printf(m, "Vendor\t\t: TQ Components\n");
0075     seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
0076     seq_printf(m, "SVR\t\t: 0x%x\n", svid);
0077
0078     /* Display cpu Pll setting */
0079     phid1 = mfspr(SPRN_HID1);
0080     seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
0081 }
0082
0083 static void tqm85xx_ti1520_fixup(struct pci_dev *pdev)
0084 {
0085     unsigned int val;
0086
0087     /* Do not do the fixup on other platforms! */
0088     if (!machine_is(tqm85xx))
0089         return;
0090
0091     dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
0092
0093     /*
0094      * Enable P2CCLK bit in system control register
0095      * to enable CLOCK output to power chip
0096      */
0097     pci_read_config_dword(pdev, 0x80, &val);
0098     pci_write_config_dword(pdev, 0x80, val | (1 << 27));
0099
0100 }
0101 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
0102         tqm85xx_ti1520_fixup);
0103
0104 machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
0105
0106 static const char * const board[] __initconst = {
0107     "tqc,tqm8540",
0108     "tqc,tqm8541",
0109     "tqc,tqm8548",
0110     "tqc,tqm8555",
0111     "tqc,tqm8560",
0112     NULL
0113 };
0114
0115 /*
0116  * Called very early, device-tree isn't unflattened
0117  */
0118 static int __init tqm85xx_probe(void)
0119 {
0120     return of_device_compatible_match(of_root, board);
0121 }
0122
0123 define_machine(tqm85xx) {
0124     .name           = "TQM85xx",
0125     .probe          = tqm85xx_probe,
0126     .setup_arch     = tqm85xx_setup_arch,
0127     .init_IRQ       = tqm85xx_pic_init,
0128     .show_cpuinfo       = tqm85xx_show_cpuinfo,
0129     .get_irq        = mpic_get_irq,
0130     .calibrate_decr     = generic_calibrate_decr,
0131     .progress       = udbg_progress,
0132 };