platforms/85xx/qemu_e500.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Paravirt target for a generic QEMU e500 machine
0004  *
0005  * This is intended to be a flexible device-tree-driven platform, not fixed
0006  * to a particular piece of hardware or a particular spec of virtual hardware,
0007  * beyond the assumption of an e500-family CPU.  Some things are still hardcoded
0008  * here, such as MPIC, but this is a limitation of the current code rather than
0009  * an interface contract with QEMU.
0010  *
0011  * Copyright 2012 Freescale Semiconductor Inc.
0012  */
0013
0014 #include <linux/kernel.h>
0015 #include <linux/of.h>
0016 #include <linux/of_fdt.h>
0017 #include <linux/pgtable.h>
0018 #include <asm/machdep.h>
0019 #include <asm/time.h>
0020 #include <asm/udbg.h>
0021 #include <asm/mpic.h>
0022 #include <asm/swiotlb.h>
0023 #include <sysdev/fsl_soc.h>
0024 #include <sysdev/fsl_pci.h>
0025 #include "smp.h"
0026 #include "mpc85xx.h"
0027
0028 void __init qemu_e500_pic_init(void)
0029 {
0030     struct mpic *mpic;
0031     unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
0032         MPIC_ENABLE_COREINT;
0033
0034     mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC  ");
0035
0036     BUG_ON(mpic == NULL);
0037     mpic_init(mpic);
0038 }
0039
0040 static void __init qemu_e500_setup_arch(void)
0041 {
0042     ppc_md.progress("qemu_e500_setup_arch()", 0);
0043
0044     fsl_pci_assign_primary();
0045     swiotlb_detect_4g();
0046     mpc85xx_smp_init();
0047 }
0048
0049 /*
0050  * Called very early, device-tree isn't unflattened
0051  */
0052 static int __init qemu_e500_probe(void)
0053 {
0054     return !!of_machine_is_compatible("fsl,qemu-e500");
0055 }
0056
0057 machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
0058
0059 define_machine(qemu_e500) {
0060     .name           = "QEMU e500",
0061     .probe          = qemu_e500_probe,
0062     .setup_arch     = qemu_e500_setup_arch,
0063     .init_IRQ       = qemu_e500_pic_init,
0064 #ifdef CONFIG_PCI
0065     .pcibios_fixup_bus  = fsl_pcibios_fixup_bus,
0066     .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
0067 #endif
0068     .get_irq        = mpic_get_coreint_irq,
0069     .calibrate_decr     = generic_calibrate_decr,
0070     .progress       = udbg_progress,
0071 #ifdef CONFIG_PPC64
0072     .power_save     = book3e_idle,
0073 #else
0074     .power_save     = e500_idle,
0075 #endif
0076 };