platforms/85xx/p1023_rdb.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
0004  *
0005  * Author: Roy Zang <tie-fei.zang@freescale.com>
0006  *
0007  * Description:
0008  * P1023 RDB Board Setup
0009  */
0010
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/errno.h>
0014 #include <linux/pci.h>
0015 #include <linux/delay.h>
0016 #include <linux/module.h>
0017 #include <linux/fsl_devices.h>
0018 #include <linux/of_address.h>
0019 #include <linux/of_platform.h>
0020 #include <linux/of_device.h>
0021
0022 #include <asm/time.h>
0023 #include <asm/machdep.h>
0024 #include <asm/pci-bridge.h>
0025 #include <mm/mmu_decl.h>
0026 #include <asm/udbg.h>
0027 #include <asm/mpic.h>
0028 #include "smp.h"
0029
0030 #include <sysdev/fsl_soc.h>
0031 #include <sysdev/fsl_pci.h>
0032
0033 #include "mpc85xx.h"
0034
0035 /* ************************************************************************
0036  *
0037  * Setup the architecture
0038  *
0039  */
0040 static void __init mpc85xx_rdb_setup_arch(void)
0041 {
0042     struct device_node *np;
0043
0044     if (ppc_md.progress)
0045         ppc_md.progress("p1023_rdb_setup_arch()", 0);
0046
0047     /* Map BCSR area */
0048     np = of_find_node_by_name(NULL, "bcsr");
0049     if (np != NULL) {
0050         static u8 __iomem *bcsr_regs;
0051
0052         bcsr_regs = of_iomap(np, 0);
0053         of_node_put(np);
0054
0055         if (!bcsr_regs) {
0056             printk(KERN_ERR
0057                    "BCSR: Failed to map bcsr register space\n");
0058             return;
0059         } else {
0060 #define BCSR15_I2C_BUS0_SEG_CLR     0x07
0061 #define BCSR15_I2C_BUS0_SEG2        0x02
0062 /*
0063  * Note: Accessing exclusively i2c devices.
0064  *
0065  * The i2c controller selects initially ID EEPROM in the u-boot;
0066  * but if menu configuration selects RTC support in the kernel,
0067  * the i2c controller switches to select RTC chip in the kernel.
0068  */
0069 #ifdef CONFIG_RTC_CLASS
0070             /* Enable RTC chip on the segment #2 of i2c */
0071             clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
0072             setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
0073 #endif
0074
0075             iounmap(bcsr_regs);
0076         }
0077     }
0078
0079     mpc85xx_smp_init();
0080
0081     fsl_pci_assign_primary();
0082 }
0083
0084 machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
0085
0086 static void __init mpc85xx_rdb_pic_init(void)
0087 {
0088     struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
0089         MPIC_SINGLE_DEST_CPU,
0090         0, 256, " OpenPIC  ");
0091
0092     BUG_ON(mpic == NULL);
0093
0094     mpic_init(mpic);
0095 }
0096
0097 static int __init p1023_rdb_probe(void)
0098 {
0099     return of_machine_is_compatible("fsl,P1023RDB");
0100
0101 }
0102
0103 define_machine(p1023_rdb) {
0104     .name           = "P1023 RDB",
0105     .probe          = p1023_rdb_probe,
0106     .setup_arch     = mpc85xx_rdb_setup_arch,
0107     .init_IRQ       = mpc85xx_rdb_pic_init,
0108     .get_irq        = mpic_get_irq,
0109     .calibrate_decr     = generic_calibrate_decr,
0110     .progress       = udbg_progress,
0111 #ifdef CONFIG_PCI
0112     .pcibios_fixup_bus  = fsl_pcibios_fixup_bus,
0113     .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
0114 #endif
0115 };