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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * MPC85xx PM operators
0004  *
0005  * Copyright 2015 Freescale Semiconductor Inc.
0006  */
0007 
0008 #define pr_fmt(fmt) "%s: " fmt, __func__
0009 
0010 #include <linux/kernel.h>
0011 #include <linux/of.h>
0012 #include <linux/of_address.h>
0013 #include <linux/fsl/guts.h>
0014 
0015 #include <asm/io.h>
0016 #include <asm/fsl_pm.h>
0017 
0018 #include "smp.h"
0019 
0020 static struct ccsr_guts __iomem *guts;
0021 
0022 #ifdef CONFIG_FSL_PMC
0023 static void mpc85xx_irq_mask(int cpu)
0024 {
0025 
0026 }
0027 
0028 static void mpc85xx_irq_unmask(int cpu)
0029 {
0030 
0031 }
0032 
0033 static void mpc85xx_cpu_die(int cpu)
0034 {
0035     u32 tmp;
0036 
0037     tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
0038     mtspr(SPRN_HID0, tmp);
0039 
0040     /* Enter NAP mode. */
0041     tmp = mfmsr();
0042     tmp |= MSR_WE;
0043     asm volatile(
0044         "msync\n"
0045         "mtmsr %0\n"
0046         "isync\n"
0047         :
0048         : "r" (tmp));
0049 }
0050 
0051 static void mpc85xx_cpu_up_prepare(int cpu)
0052 {
0053 
0054 }
0055 #endif
0056 
0057 static void mpc85xx_freeze_time_base(bool freeze)
0058 {
0059     uint32_t mask;
0060 
0061     mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
0062     if (freeze)
0063         setbits32(&guts->devdisr, mask);
0064     else
0065         clrbits32(&guts->devdisr, mask);
0066 
0067     in_be32(&guts->devdisr);
0068 }
0069 
0070 static const struct of_device_id mpc85xx_smp_guts_ids[] = {
0071     { .compatible = "fsl,mpc8572-guts", },
0072     { .compatible = "fsl,p1020-guts", },
0073     { .compatible = "fsl,p1021-guts", },
0074     { .compatible = "fsl,p1022-guts", },
0075     { .compatible = "fsl,p1023-guts", },
0076     { .compatible = "fsl,p2020-guts", },
0077     { .compatible = "fsl,bsc9132-guts", },
0078     {},
0079 };
0080 
0081 static const struct fsl_pm_ops mpc85xx_pm_ops = {
0082     .freeze_time_base = mpc85xx_freeze_time_base,
0083 #ifdef CONFIG_FSL_PMC
0084     .irq_mask = mpc85xx_irq_mask,
0085     .irq_unmask = mpc85xx_irq_unmask,
0086     .cpu_die = mpc85xx_cpu_die,
0087     .cpu_up_prepare = mpc85xx_cpu_up_prepare,
0088 #endif
0089 };
0090 
0091 int __init mpc85xx_setup_pmc(void)
0092 {
0093     struct device_node *np;
0094 
0095     np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
0096     if (np) {
0097         guts = of_iomap(np, 0);
0098         of_node_put(np);
0099         if (!guts) {
0100             pr_err("Could not map guts node address\n");
0101             return -ENOMEM;
0102         }
0103         qoriq_pm_ops = &mpc85xx_pm_ops;
0104     }
0105 
0106     return 0;
0107 }