platforms/83xx/mpc836x_mds.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
0004  *
0005  * Author: Li Yang <LeoLi@freescale.com>
0006  *     Yin Olivia <Hong-hua.Yin@freescale.com>
0007  *
0008  * Description:
0009  * MPC8360E MDS board specific routines.
0010  *
0011  * Changelog:
0012  * Jun 21, 2006 Initial version
0013  */
0014
0015 #include <linux/stddef.h>
0016 #include <linux/kernel.h>
0017 #include <linux/compiler.h>
0018 #include <linux/init.h>
0019 #include <linux/errno.h>
0020 #include <linux/reboot.h>
0021 #include <linux/pci.h>
0022 #include <linux/kdev_t.h>
0023 #include <linux/major.h>
0024 #include <linux/console.h>
0025 #include <linux/delay.h>
0026 #include <linux/seq_file.h>
0027 #include <linux/root_dev.h>
0028 #include <linux/initrd.h>
0029 #include <linux/of_platform.h>
0030 #include <linux/of_device.h>
0031
0032 #include <linux/atomic.h>
0033 #include <asm/time.h>
0034 #include <asm/io.h>
0035 #include <asm/machdep.h>
0036 #include <asm/ipic.h>
0037 #include <asm/irq.h>
0038 #include <asm/udbg.h>
0039 #include <sysdev/fsl_soc.h>
0040 #include <sysdev/fsl_pci.h>
0041 #include <soc/fsl/qe/qe.h>
0042
0043 #include "mpc83xx.h"
0044
0045 #undef DEBUG
0046 #ifdef DEBUG
0047 #define DBG(fmt...) udbg_printf(fmt)
0048 #else
0049 #define DBG(fmt...)
0050 #endif
0051
0052 /* ************************************************************************
0053  *
0054  * Setup the architecture
0055  *
0056  */
0057 static void __init mpc836x_mds_setup_arch(void)
0058 {
0059     struct device_node *np;
0060     u8 __iomem *bcsr_regs = NULL;
0061
0062     mpc83xx_setup_arch();
0063
0064     /* Map BCSR area */
0065     np = of_find_node_by_name(NULL, "bcsr");
0066     if (np) {
0067         struct resource res;
0068
0069         of_address_to_resource(np, 0, &res);
0070         bcsr_regs = ioremap(res.start, resource_size(&res));
0071         of_node_put(np);
0072     }
0073
0074 #ifdef CONFIG_QUICC_ENGINE
0075     if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
0076         par_io_init(np);
0077         of_node_put(np);
0078
0079         for_each_node_by_name(np, "ucc")
0080             par_io_of_config(np);
0081 #ifdef CONFIG_QE_USB
0082         /* Must fixup Par IO before QE GPIO chips are registered. */
0083         par_io_config_pin(1,  2, 1, 0, 3, 0); /* USBOE  */
0084         par_io_config_pin(1,  3, 1, 0, 3, 0); /* USBTP  */
0085         par_io_config_pin(1,  8, 1, 0, 1, 0); /* USBTN  */
0086         par_io_config_pin(1, 10, 2, 0, 3, 0); /* USBRXD */
0087         par_io_config_pin(1,  9, 2, 1, 3, 0); /* USBRP  */
0088         par_io_config_pin(1, 11, 2, 1, 3, 0); /* USBRN  */
0089         par_io_config_pin(2, 20, 2, 0, 1, 0); /* CLK21  */
0090 #endif /* CONFIG_QE_USB */
0091     }
0092
0093     if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
0094             != NULL){
0095         uint svid;
0096
0097         /* Reset the Ethernet PHY */
0098 #define BCSR9_GETHRST 0x20
0099         clrbits8(&bcsr_regs[9], BCSR9_GETHRST);
0100         udelay(1000);
0101         setbits8(&bcsr_regs[9], BCSR9_GETHRST);
0102
0103         /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
0104         svid = mfspr(SPRN_SVR);
0105         if (svid == 0x80480021) {
0106             void __iomem *immap;
0107
0108             immap = ioremap(get_immrbase() + 0x14a8, 8);
0109
0110             /*
0111              * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
0112              * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
0113              */
0114             setbits32(immap, 0x0c003000);
0115
0116             /*
0117              * IMMR + 0x14AC[20:27] = 10101010
0118              * (data delay for both UCC's)
0119              */
0120             clrsetbits_be32(immap + 4, 0xff0, 0xaa0);
0121
0122             iounmap(immap);
0123         }
0124
0125         iounmap(bcsr_regs);
0126         of_node_put(np);
0127     }
0128 #endif              /* CONFIG_QUICC_ENGINE */
0129 }
0130
0131 machine_device_initcall(mpc836x_mds, mpc83xx_declare_of_platform_devices);
0132
0133 #ifdef CONFIG_QE_USB
0134 static int __init mpc836x_usb_cfg(void)
0135 {
0136     u8 __iomem *bcsr;
0137     struct device_node *np;
0138     const char *mode;
0139     int ret = 0;
0140
0141     np = of_find_compatible_node(NULL, NULL, "fsl,mpc8360mds-bcsr");
0142     if (!np)
0143         return -ENODEV;
0144
0145     bcsr = of_iomap(np, 0);
0146     of_node_put(np);
0147     if (!bcsr)
0148         return -ENOMEM;
0149
0150     np = of_find_compatible_node(NULL, NULL, "fsl,mpc8323-qe-usb");
0151     if (!np) {
0152         ret = -ENODEV;
0153         goto err;
0154     }
0155
0156 #define BCSR8_TSEC1M_MASK   (0x3 << 6)
0157 #define BCSR8_TSEC1M_RGMII  (0x0 << 6)
0158 #define BCSR8_TSEC2M_MASK   (0x3 << 4)
0159 #define BCSR8_TSEC2M_RGMII  (0x0 << 4)
0160     /*
0161      * Default is GMII (2), but we should set it to RGMII (0) if we use
0162      * USB (Eth PHY is in RGMII mode anyway).
0163      */
0164     clrsetbits_8(&bcsr[8], BCSR8_TSEC1M_MASK | BCSR8_TSEC2M_MASK,
0165                    BCSR8_TSEC1M_RGMII | BCSR8_TSEC2M_RGMII);
0166
0167 #define BCSR13_USBMASK  0x0f
0168 #define BCSR13_nUSBEN   0x08 /* 1 - Disable, 0 - Enable         */
0169 #define BCSR13_USBSPEED 0x04 /* 1 - Full, 0 - Low           */
0170 #define BCSR13_USBMODE  0x02 /* 1 - Host, 0 - Function          */
0171 #define BCSR13_nUSBVCC  0x01 /* 1 - gets VBUS, 0 - supplies VBUS    */
0172
0173     clrsetbits_8(&bcsr[13], BCSR13_USBMASK, BCSR13_USBSPEED);
0174
0175     mode = of_get_property(np, "mode", NULL);
0176     if (mode && !strcmp(mode, "peripheral")) {
0177         setbits8(&bcsr[13], BCSR13_nUSBVCC);
0178         qe_usb_clock_set(QE_CLK21, 48000000);
0179     } else {
0180         setbits8(&bcsr[13], BCSR13_USBMODE);
0181     }
0182
0183     of_node_put(np);
0184 err:
0185     iounmap(bcsr);
0186     return ret;
0187 }
0188 machine_arch_initcall(mpc836x_mds, mpc836x_usb_cfg);
0189 #endif /* CONFIG_QE_USB */
0190
0191 /*
0192  * Called very early, MMU is off, device-tree isn't unflattened
0193  */
0194 static int __init mpc836x_mds_probe(void)
0195 {
0196     return of_machine_is_compatible("MPC836xMDS");
0197 }
0198
0199 define_machine(mpc836x_mds) {
0200     .name       = "MPC836x MDS",
0201     .probe      = mpc836x_mds_probe,
0202     .setup_arch = mpc836x_mds_setup_arch,
0203     .discover_phbs  = mpc83xx_setup_pci,
0204     .init_IRQ   = mpc83xx_ipic_init_IRQ,
0205     .get_irq    = ipic_get_irq,
0206     .restart    = mpc83xx_restart,
0207     .time_init  = mpc83xx_time_init,
0208     .calibrate_decr = generic_calibrate_decr,
0209     .progress   = udbg_progress,
0210 };