platforms/83xx/mpc832x_rdb.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * arch/powerpc/platforms/83xx/mpc832x_rdb.c
0004  *
0005  * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved.
0006  *
0007  * Description:
0008  * MPC832x RDB board specific routines.
0009  * This file is based on mpc832x_mds.c and mpc8313_rdb.c
0010  * Author: Michael Barkowski <michael.barkowski@freescale.com>
0011  */
0012
0013 #include <linux/pci.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/spi/spi.h>
0016 #include <linux/spi/mmc_spi.h>
0017 #include <linux/mmc/host.h>
0018 #include <linux/of_irq.h>
0019 #include <linux/of_platform.h>
0020 #include <linux/fsl_devices.h>
0021
0022 #include <asm/time.h>
0023 #include <asm/ipic.h>
0024 #include <asm/udbg.h>
0025 #include <soc/fsl/qe/qe.h>
0026 #include <sysdev/fsl_soc.h>
0027 #include <sysdev/fsl_pci.h>
0028
0029 #include "mpc83xx.h"
0030
0031 #undef DEBUG
0032 #ifdef DEBUG
0033 #define DBG(fmt...) udbg_printf(fmt)
0034 #else
0035 #define DBG(fmt...)
0036 #endif
0037
0038 #ifdef CONFIG_QUICC_ENGINE
0039 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
0040                    struct spi_board_info *board_infos,
0041                    unsigned int num_board_infos,
0042                    void (*cs_control)(struct spi_device *dev,
0043                               bool on))
0044 {
0045     struct device_node *np;
0046     unsigned int i = 0;
0047
0048     for_each_compatible_node(np, type, compatible) {
0049         int ret;
0050         unsigned int j;
0051         const void *prop;
0052         struct resource res[2];
0053         struct platform_device *pdev;
0054         struct fsl_spi_platform_data pdata = {
0055             .cs_control = cs_control,
0056         };
0057
0058         memset(res, 0, sizeof(res));
0059
0060         pdata.sysclk = sysclk;
0061
0062         prop = of_get_property(np, "reg", NULL);
0063         if (!prop)
0064             goto err;
0065         pdata.bus_num = *(u32 *)prop;
0066
0067         prop = of_get_property(np, "cell-index", NULL);
0068         if (prop)
0069             i = *(u32 *)prop;
0070
0071         prop = of_get_property(np, "mode", NULL);
0072         if (prop && !strcmp(prop, "cpu-qe"))
0073             pdata.flags = SPI_QE_CPU_MODE;
0074
0075         for (j = 0; j < num_board_infos; j++) {
0076             if (board_infos[j].bus_num == pdata.bus_num)
0077                 pdata.max_chipselect++;
0078         }
0079
0080         if (!pdata.max_chipselect)
0081             continue;
0082
0083         ret = of_address_to_resource(np, 0, &res[0]);
0084         if (ret)
0085             goto err;
0086
0087         ret = of_irq_to_resource(np, 0, &res[1]);
0088         if (ret <= 0)
0089             goto err;
0090
0091         pdev = platform_device_alloc("mpc83xx_spi", i);
0092         if (!pdev)
0093             goto err;
0094
0095         ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
0096         if (ret)
0097             goto unreg;
0098
0099         ret = platform_device_add_resources(pdev, res,
0100                             ARRAY_SIZE(res));
0101         if (ret)
0102             goto unreg;
0103
0104         ret = platform_device_add(pdev);
0105         if (ret)
0106             goto unreg;
0107
0108         goto next;
0109 unreg:
0110         platform_device_del(pdev);
0111 err:
0112         pr_err("%pOF: registration failed\n", np);
0113 next:
0114         i++;
0115     }
0116
0117     return i;
0118 }
0119
0120 static int __init fsl_spi_init(struct spi_board_info *board_infos,
0121                    unsigned int num_board_infos,
0122                    void (*cs_control)(struct spi_device *spi,
0123                           bool on))
0124 {
0125     u32 sysclk = -1;
0126     int ret;
0127
0128     /* SPI controller is either clocked from QE or SoC clock */
0129     sysclk = get_brgfreq();
0130     if (sysclk == -1) {
0131         sysclk = fsl_get_sys_freq();
0132         if (sysclk == -1)
0133             return -ENODEV;
0134     }
0135
0136     ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
0137                    num_board_infos, cs_control);
0138     if (!ret)
0139         of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
0140                  num_board_infos, cs_control);
0141
0142     return spi_register_board_info(board_infos, num_board_infos);
0143 }
0144
0145 static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
0146 {
0147     pr_debug("%s %d %d\n", __func__, spi->chip_select, on);
0148     par_io_data_set(3, 13, on);
0149 }
0150
0151 static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
0152     .ocr_mask = MMC_VDD_33_34,
0153 };
0154
0155 static struct spi_board_info mpc832x_spi_boardinfo = {
0156     .bus_num = 0x4c0,
0157     .chip_select = 0,
0158     .max_speed_hz = 50000000,
0159     .modalias = "mmc_spi",
0160     .platform_data = &mpc832x_mmc_pdata,
0161 };
0162
0163 static int __init mpc832x_spi_init(void)
0164 {
0165     par_io_config_pin(3,  0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
0166     par_io_config_pin(3,  1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
0167     par_io_config_pin(3,  2, 3, 0, 1, 0); /* SPI1 CLK,  I/O */
0168     par_io_config_pin(3,  3, 2, 0, 1, 0); /* SPI1 SEL,  I   */
0169
0170     par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS,    O */
0171     par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
0172     par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
0173
0174     /*
0175      * Don't bother with legacy stuff when device tree contains
0176      * mmc-spi-slot node.
0177      */
0178     if (of_find_compatible_node(NULL, NULL, "mmc-spi-slot"))
0179         return 0;
0180     return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control);
0181 }
0182 machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
0183 #endif /* CONFIG_QUICC_ENGINE */
0184
0185 /* ************************************************************************
0186  *
0187  * Setup the architecture
0188  *
0189  */
0190 static void __init mpc832x_rdb_setup_arch(void)
0191 {
0192 #if defined(CONFIG_QUICC_ENGINE)
0193     struct device_node *np;
0194 #endif
0195
0196     mpc83xx_setup_arch();
0197
0198 #ifdef CONFIG_QUICC_ENGINE
0199     if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
0200         par_io_init(np);
0201         of_node_put(np);
0202
0203         for_each_node_by_name(np, "ucc")
0204             par_io_of_config(np);
0205     }
0206 #endif              /* CONFIG_QUICC_ENGINE */
0207 }
0208
0209 machine_device_initcall(mpc832x_rdb, mpc83xx_declare_of_platform_devices);
0210
0211 /*
0212  * Called very early, MMU is off, device-tree isn't unflattened
0213  */
0214 static int __init mpc832x_rdb_probe(void)
0215 {
0216     return of_machine_is_compatible("MPC832xRDB");
0217 }
0218
0219 define_machine(mpc832x_rdb) {
0220     .name       = "MPC832x RDB",
0221     .probe      = mpc832x_rdb_probe,
0222     .setup_arch = mpc832x_rdb_setup_arch,
0223     .discover_phbs  = mpc83xx_setup_pci,
0224     .init_IRQ   = mpc83xx_ipic_init_IRQ,
0225     .get_irq    = ipic_get_irq,
0226     .restart    = mpc83xx_restart,
0227     .time_init  = mpc83xx_time_init,
0228     .calibrate_decr = generic_calibrate_decr,
0229     .progress   = udbg_progress,
0230 };