platforms/82xx/pq2fads.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * PQ2FADS board support
0004  *
0005  * Copyright 2007 Freescale Semiconductor, Inc.
0006  * Author: Scott Wood <scottwood@freescale.com>
0007  *
0008  * Loosely based on mp82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
0009  * Copyright (c) 2006 MontaVista Software, Inc.
0010  */
0011
0012 #include <linux/init.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/fsl_devices.h>
0015 #include <linux/of_address.h>
0016 #include <linux/of_fdt.h>
0017 #include <linux/of_platform.h>
0018
0019 #include <asm/io.h>
0020 #include <asm/cpm2.h>
0021 #include <asm/udbg.h>
0022 #include <asm/machdep.h>
0023 #include <asm/time.h>
0024
0025 #include <sysdev/fsl_soc.h>
0026 #include <sysdev/cpm2_pic.h>
0027
0028 #include "pq2ads.h"
0029 #include "pq2.h"
0030
0031 static void __init pq2fads_pic_init(void)
0032 {
0033     struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
0034     if (!np) {
0035         printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
0036         return;
0037     }
0038
0039     cpm2_pic_init(np);
0040     of_node_put(np);
0041
0042     /* Initialize stuff for the 82xx CPLD IC and install demux  */
0043     pq2ads_pci_init_irq();
0044 }
0045
0046 struct cpm_pin {
0047     int port, pin, flags;
0048 };
0049
0050 static struct cpm_pin pq2fads_pins[] = {
0051     /* SCC1 */
0052     {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0053     {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0054
0055     /* SCC2 */
0056     {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0057     {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0058
0059     /* FCC2 */
0060     {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0061     {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0062     {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0063     {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0064     {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0065     {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0066     {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0067     {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0068     {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0069     {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0070     {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0071     {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0072     {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0073     {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0074     {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0075     {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0076
0077     /* FCC3 */
0078     {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0079     {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0080     {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0081     {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0082     {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0083     {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0084     {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0085     {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0086     {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0087     {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0088     {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0089     {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0090     {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0091     {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0092     {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0093     {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0094 };
0095
0096 static void __init init_ioports(void)
0097 {
0098     int i;
0099
0100     for (i = 0; i < ARRAY_SIZE(pq2fads_pins); i++) {
0101         struct cpm_pin *pin = &pq2fads_pins[i];
0102         cpm2_set_pin(pin->port, pin->pin, pin->flags);
0103     }
0104
0105     cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
0106     cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
0107     cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
0108     cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
0109     cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
0110     cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
0111     cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
0112     cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
0113 }
0114
0115 static void __init pq2fads_setup_arch(void)
0116 {
0117     struct device_node *np;
0118     __be32 __iomem *bcsr;
0119
0120     if (ppc_md.progress)
0121         ppc_md.progress("pq2fads_setup_arch()", 0);
0122
0123     cpm2_reset();
0124
0125     np = of_find_compatible_node(NULL, NULL, "fsl,pq2fads-bcsr");
0126     if (!np) {
0127         printk(KERN_ERR "No fsl,pq2fads-bcsr in device tree\n");
0128         return;
0129     }
0130
0131     bcsr = of_iomap(np, 0);
0132     of_node_put(np);
0133     if (!bcsr) {
0134         printk(KERN_ERR "Cannot map BCSR registers\n");
0135         return;
0136     }
0137
0138     /* Enable the serial and ethernet ports */
0139
0140     clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
0141     setbits32(&bcsr[1], BCSR1_FETH_RST);
0142
0143     clrbits32(&bcsr[3], BCSR3_FETHIEN2);
0144     setbits32(&bcsr[3], BCSR3_FETH2_RST);
0145
0146     iounmap(bcsr);
0147
0148     init_ioports();
0149
0150     /* Enable external IRQs */
0151     clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000);
0152
0153     if (ppc_md.progress)
0154         ppc_md.progress("pq2fads_setup_arch(), finish", 0);
0155 }
0156
0157 /*
0158  * Called very early, device-tree isn't unflattened
0159  */
0160 static int __init pq2fads_probe(void)
0161 {
0162     return of_machine_is_compatible("fsl,pq2fads");
0163 }
0164
0165 static const struct of_device_id of_bus_ids[] __initconst = {
0166     { .name = "soc", },
0167     { .name = "cpm", },
0168     { .name = "localbus", },
0169     {},
0170 };
0171
0172 static int __init declare_of_platform_devices(void)
0173 {
0174     /* Publish the QE devices */
0175     of_platform_bus_probe(NULL, of_bus_ids, NULL);
0176     return 0;
0177 }
0178 machine_device_initcall(pq2fads, declare_of_platform_devices);
0179
0180 define_machine(pq2fads)
0181 {
0182     .name = "Freescale PQ2FADS",
0183     .probe = pq2fads_probe,
0184     .setup_arch = pq2fads_setup_arch,
0185     .discover_phbs = pq2_init_pci,
0186     .init_IRQ = pq2fads_pic_init,
0187     .get_irq = cpm2_get_irq,
0188     .calibrate_decr = generic_calibrate_decr,
0189     .restart = pq2_restart,
0190     .progress = udbg_progress,
0191 };