platforms/82xx/km82xx.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Keymile km82xx support
0004  * Copyright 2008-2011 DENX Software Engineering GmbH
0005  * Author: Heiko Schocher <hs@denx.de>
0006  *
0007  * based on code from:
0008  * Copyright 2007 Freescale Semiconductor, Inc.
0009  * Author: Scott Wood <scottwood@freescale.com>
0010  */
0011
0012 #include <linux/init.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/fsl_devices.h>
0015 #include <linux/of_platform.h>
0016
0017 #include <linux/io.h>
0018 #include <asm/cpm2.h>
0019 #include <asm/udbg.h>
0020 #include <asm/machdep.h>
0021 #include <linux/time.h>
0022 #include <asm/mpc8260.h>
0023
0024 #include <sysdev/fsl_soc.h>
0025 #include <sysdev/cpm2_pic.h>
0026
0027 #include "pq2.h"
0028
0029 static void __init km82xx_pic_init(void)
0030 {
0031     struct device_node *np = of_find_compatible_node(NULL, NULL,
0032                             "fsl,pq2-pic");
0033     if (!np) {
0034         pr_err("PIC init: can not find cpm-pic node\n");
0035         return;
0036     }
0037
0038     cpm2_pic_init(np);
0039     of_node_put(np);
0040 }
0041
0042 struct cpm_pin {
0043     int port, pin, flags;
0044 };
0045
0046 static __initdata struct cpm_pin km82xx_pins[] = {
0047     /* SMC1 */
0048     {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0049     {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0050
0051     /* SMC2 */
0052     {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0053     {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0054
0055     /* SCC1 */
0056     {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0057     {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0058     {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0059     {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0060
0061     /* SCC4 */
0062     {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0063     {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0064     {2,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0065     {2,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0066     {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0067     {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0068
0069     /* FCC1 */
0070     {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0071     {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0072     {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0073     {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0074     {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0075     {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0076     {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0077     {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0078     {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
0079     {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
0080     {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0081     {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0082     {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
0083     {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
0084
0085     {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0086     {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0087
0088     /* FCC2 */
0089     {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0090     {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0091     {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0092     {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0093     {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0094     {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0095     {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0096     {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0097     {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0098     {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0099     {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0100     {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
0101     {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0102     {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
0103
0104     {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0105     {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
0106
0107     /* MDC */
0108     {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
0109
0110 #if defined(CONFIG_I2C_CPM)
0111     /* I2C */
0112     {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
0113     {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
0114 #endif
0115
0116     /* USB */
0117     {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /* FULL_SPEED */
0118     {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /*/SLAVE */
0119     {2, 10, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXN */
0120     {2, 11, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXP */
0121     {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
0122     {2, 27, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXCLK */
0123     {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
0124     {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
0125     {3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
0126
0127     /* SPI */
0128     {3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
0129     {3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
0130     {3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
0131 };
0132
0133 static void __init init_ioports(void)
0134 {
0135     int i;
0136
0137     for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
0138         const struct cpm_pin *pin = &km82xx_pins[i];
0139         cpm2_set_pin(pin->port, pin->pin, pin->flags);
0140     }
0141
0142     cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
0143     cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
0144     cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
0145     cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
0146     cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
0147     cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
0148     cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
0149     cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
0150     cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);
0151     cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
0152     cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
0153
0154     /* Force USB FULL SPEED bit to '1' */
0155     setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
0156     /* clear USB_SLAVE */
0157     clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
0158 }
0159
0160 static void __init km82xx_setup_arch(void)
0161 {
0162     if (ppc_md.progress)
0163         ppc_md.progress("km82xx_setup_arch()", 0);
0164
0165     cpm2_reset();
0166
0167     /* When this is set, snooping CPM DMA from RAM causes
0168      * machine checks.  See erratum SIU18.
0169      */
0170     clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
0171
0172     init_ioports();
0173
0174     if (ppc_md.progress)
0175         ppc_md.progress("km82xx_setup_arch(), finish", 0);
0176 }
0177
0178 static const struct of_device_id of_bus_ids[] __initconst = {
0179     { .compatible = "simple-bus", },
0180     {},
0181 };
0182
0183 static int __init declare_of_platform_devices(void)
0184 {
0185     of_platform_bus_probe(NULL, of_bus_ids, NULL);
0186
0187     return 0;
0188 }
0189 machine_device_initcall(km82xx, declare_of_platform_devices);
0190
0191 /*
0192  * Called very early, device-tree isn't unflattened
0193  */
0194 static int __init km82xx_probe(void)
0195 {
0196     return of_machine_is_compatible("keymile,km82xx");
0197 }
0198
0199 define_machine(km82xx)
0200 {
0201     .name = "Keymile km82xx",
0202     .probe = km82xx_probe,
0203     .setup_arch = km82xx_setup_arch,
0204     .init_IRQ = km82xx_pic_init,
0205     .get_irq = cpm2_get_irq,
0206     .calibrate_decr = generic_calibrate_decr,
0207     .restart = pq2_restart,
0208     .progress = udbg_progress,
0209 };