platforms/52xx/lite5200.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Freescale Lite5200 board support
0004  *
0005  * Written by: Grant Likely <grant.likely@secretlab.ca>
0006  *
0007  * Copyright (C) Secret Lab Technologies Ltd. 2006. All rights reserved.
0008  * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
0009  *
0010  * Description:
0011  */
0012
0013 #undef DEBUG
0014
0015 #include <linux/init.h>
0016 #include <linux/pci.h>
0017 #include <linux/of.h>
0018 #include <linux/of_address.h>
0019 #include <linux/root_dev.h>
0020 #include <linux/initrd.h>
0021 #include <asm/time.h>
0022 #include <asm/io.h>
0023 #include <asm/machdep.h>
0024 #include <asm/mpc52xx.h>
0025
0026 /* ************************************************************************
0027  *
0028  * Setup the architecture
0029  *
0030  */
0031
0032 /* mpc5200 device tree match tables */
0033 static const struct of_device_id mpc5200_cdm_ids[] __initconst = {
0034     { .compatible = "fsl,mpc5200-cdm", },
0035     { .compatible = "mpc5200-cdm", },
0036     {}
0037 };
0038
0039 static const struct of_device_id mpc5200_gpio_ids[] __initconst = {
0040     { .compatible = "fsl,mpc5200-gpio", },
0041     { .compatible = "mpc5200-gpio", },
0042     {}
0043 };
0044
0045 /*
0046  * Fix clock configuration.
0047  *
0048  * Firmware is supposed to be responsible for this.  If you are creating a
0049  * new board port, do *NOT* duplicate this code.  Fix your boot firmware
0050  * to set it correctly in the first place
0051  */
0052 static void __init
0053 lite5200_fix_clock_config(void)
0054 {
0055     struct device_node *np;
0056     struct mpc52xx_cdm  __iomem *cdm;
0057     /* Map zones */
0058     np = of_find_matching_node(NULL, mpc5200_cdm_ids);
0059     cdm = of_iomap(np, 0);
0060     of_node_put(np);
0061     if (!cdm) {
0062         printk(KERN_ERR "%s() failed; expect abnormal behaviour\n",
0063                __func__);
0064         return;
0065     }
0066
0067     /* Use internal 48 Mhz */
0068     out_8(&cdm->ext_48mhz_en, 0x00);
0069     out_8(&cdm->fd_enable, 0x01);
0070     if (in_be32(&cdm->rstcfg) & 0x40)   /* Assumes 33Mhz clock */
0071         out_be16(&cdm->fd_counters, 0x0001);
0072     else
0073         out_be16(&cdm->fd_counters, 0x5555);
0074
0075     /* Unmap the regs */
0076     iounmap(cdm);
0077 }
0078
0079 /*
0080  * Fix setting of port_config register.
0081  *
0082  * Firmware is supposed to be responsible for this.  If you are creating a
0083  * new board port, do *NOT* duplicate this code.  Fix your boot firmware
0084  * to set it correctly in the first place
0085  */
0086 static void __init
0087 lite5200_fix_port_config(void)
0088 {
0089     struct device_node *np;
0090     struct mpc52xx_gpio __iomem *gpio;
0091     u32 port_config;
0092
0093     np = of_find_matching_node(NULL, mpc5200_gpio_ids);
0094     gpio = of_iomap(np, 0);
0095     of_node_put(np);
0096     if (!gpio) {
0097         printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
0098                __func__);
0099         return;
0100     }
0101
0102     /* Set port config */
0103     port_config = in_be32(&gpio->port_config);
0104
0105     port_config &= ~0x00800000; /* 48Mhz internal, pin is GPIO  */
0106
0107     port_config &= ~0x00007000; /* USB port : Differential mode */
0108     port_config |=  0x00001000; /*            USB 1 only    */
0109
0110     port_config &= ~0x03000000; /* ATA CS is on csb_4/5     */
0111     port_config |=  0x01000000;
0112
0113     pr_debug("port_config: old:%x new:%x\n",
0114              in_be32(&gpio->port_config), port_config);
0115     out_be32(&gpio->port_config, port_config);
0116
0117     /* Unmap zone */
0118     iounmap(gpio);
0119 }
0120
0121 #ifdef CONFIG_PM
0122 static void lite5200_suspend_prepare(void __iomem *mbar)
0123 {
0124     u8 pin = 1; /* GPIO_WKUP_1 (GPIO_PSC2_4) */
0125     u8 level = 0;   /* wakeup on low level */
0126     mpc52xx_set_wakeup_gpio(pin, level);
0127
0128     /*
0129      * power down usb port
0130      * this needs to be called before of-ohci suspend code
0131      */
0132
0133     /* set ports to "power switched" and "powered at the same time"
0134      * USB Rh descriptor A: NPS = 0, PSM = 0 */
0135     out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300);
0136     /* USB Rh status: LPS = 1 - turn off power */
0137     out_be32(mbar + 0x1050, 0x00000001);
0138 }
0139
0140 static void lite5200_resume_finish(void __iomem *mbar)
0141 {
0142     /* USB Rh status: LPSC = 1 - turn on power */
0143     out_be32(mbar + 0x1050, 0x00010000);
0144 }
0145 #endif
0146
0147 static void __init lite5200_setup_arch(void)
0148 {
0149     if (ppc_md.progress)
0150         ppc_md.progress("lite5200_setup_arch()", 0);
0151
0152     /* Map important registers from the internal memory map */
0153     mpc52xx_map_common_devices();
0154
0155     /* Some mpc5200 & mpc5200b related configuration */
0156     mpc5200_setup_xlb_arbiter();
0157
0158     /* Fix things that firmware should have done. */
0159     lite5200_fix_clock_config();
0160     lite5200_fix_port_config();
0161
0162 #ifdef CONFIG_PM
0163     mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
0164     mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
0165     lite5200_pm_init();
0166 #endif
0167 }
0168
0169 static const char * const board[] __initconst = {
0170     "fsl,lite5200",
0171     "fsl,lite5200b",
0172     NULL,
0173 };
0174
0175 /*
0176  * Called very early, MMU is off, device-tree isn't unflattened
0177  */
0178 static int __init lite5200_probe(void)
0179 {
0180     return of_device_compatible_match(of_root, board);
0181 }
0182
0183 define_machine(lite5200) {
0184     .name       = "lite5200",
0185     .probe      = lite5200_probe,
0186     .setup_arch     = lite5200_setup_arch,
0187     .discover_phbs  = mpc52xx_setup_pci,
0188     .init       = mpc52xx_declare_of_platform_devices,
0189     .init_IRQ   = mpc52xx_init_irq,
0190     .get_irq    = mpc52xx_get_irq,
0191     .restart    = mpc52xx_restart,
0192     .calibrate_decr = generic_calibrate_decr,
0193 };