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0018 #include <linux/init.h>
0019 #include <linux/of_platform.h>
0020 #include <linux/rtc.h>
0021
0022 #include <asm/machdep.h>
0023 #include <asm/prom.h>
0024 #include <asm/udbg.h>
0025 #include <asm/time.h>
0026 #include <asm/uic.h>
0027 #include <asm/ppc4xx.h>
0028 #include <asm/mpic.h>
0029 #include <asm/mmu.h>
0030
0031 static const struct of_device_id iss4xx_of_bus[] __initconst = {
0032 { .compatible = "ibm,plb4", },
0033 { .compatible = "ibm,plb6", },
0034 { .compatible = "ibm,opb", },
0035 { .compatible = "ibm,ebc", },
0036 {},
0037 };
0038
0039 static int __init iss4xx_device_probe(void)
0040 {
0041 of_platform_bus_probe(NULL, iss4xx_of_bus, NULL);
0042 of_instantiate_rtc();
0043
0044 return 0;
0045 }
0046 machine_device_initcall(iss4xx, iss4xx_device_probe);
0047
0048
0049 static void __init iss4xx_init_irq(void)
0050 {
0051 struct device_node *np;
0052
0053
0054 for_each_node_with_property(np, "interrupt-controller") {
0055 if (of_get_property(np, "interrupts", NULL) == NULL)
0056 break;
0057 }
0058 if (np == NULL)
0059 panic("Can't find top level interrupt controller");
0060
0061
0062 if (of_device_is_compatible(np, "ibm,uic")) {
0063 uic_init_tree();
0064 ppc_md.get_irq = uic_get_irq;
0065 #ifdef CONFIG_MPIC
0066 } else if (of_device_is_compatible(np, "chrp,open-pic")) {
0067
0068
0069
0070 struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC ");
0071 BUG_ON(mpic == NULL);
0072 mpic_init(mpic);
0073 ppc_md.get_irq = mpic_get_irq;
0074 #endif
0075 } else
0076 panic("Unrecognized top level interrupt controller");
0077 }
0078
0079 #ifdef CONFIG_SMP
0080 static void smp_iss4xx_setup_cpu(int cpu)
0081 {
0082 mpic_setup_this_cpu();
0083 }
0084
0085 static int smp_iss4xx_kick_cpu(int cpu)
0086 {
0087 struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
0088 const u64 *spin_table_addr_prop;
0089 u32 *spin_table;
0090 extern void start_secondary_47x(void);
0091
0092 BUG_ON(cpunode == NULL);
0093
0094
0095
0096
0097
0098 spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr",
0099 NULL);
0100 if (spin_table_addr_prop == NULL) {
0101 pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
0102 return -ENOENT;
0103 }
0104
0105
0106
0107
0108 spin_table = (u32 *)__va(*spin_table_addr_prop);
0109 pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
0110
0111 spin_table[3] = cpu;
0112 smp_wmb();
0113 spin_table[1] = __pa(start_secondary_47x);
0114 mb();
0115
0116 return 0;
0117 }
0118
0119 static struct smp_ops_t iss_smp_ops = {
0120 .probe = smp_mpic_probe,
0121 .message_pass = smp_mpic_message_pass,
0122 .setup_cpu = smp_iss4xx_setup_cpu,
0123 .kick_cpu = smp_iss4xx_kick_cpu,
0124 .give_timebase = smp_generic_give_timebase,
0125 .take_timebase = smp_generic_take_timebase,
0126 };
0127
0128 static void __init iss4xx_smp_init(void)
0129 {
0130 if (mmu_has_feature(MMU_FTR_TYPE_47x))
0131 smp_ops = &iss_smp_ops;
0132 }
0133
0134 #else
0135 static void __init iss4xx_smp_init(void) { }
0136 #endif
0137
0138 static void __init iss4xx_setup_arch(void)
0139 {
0140 iss4xx_smp_init();
0141 }
0142
0143
0144
0145
0146 static int __init iss4xx_probe(void)
0147 {
0148 if (!of_machine_is_compatible("ibm,iss-4xx"))
0149 return 0;
0150
0151 return 1;
0152 }
0153
0154 define_machine(iss4xx) {
0155 .name = "ISS-4xx",
0156 .probe = iss4xx_probe,
0157 .progress = udbg_progress,
0158 .init_IRQ = iss4xx_init_irq,
0159 .setup_arch = iss4xx_setup_arch,
0160 .restart = ppc4xx_reset_system,
0161 .calibrate_decr = generic_calibrate_decr,
0162 };