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0001 // SPDX-License-Identifier: GPL-2.0
0002 
0003 /*
0004  * MMU-generic set_memory implementation for powerpc
0005  *
0006  * Copyright 2019-2021, IBM Corporation.
0007  */
0008 
0009 #include <linux/mm.h>
0010 #include <linux/vmalloc.h>
0011 #include <linux/set_memory.h>
0012 
0013 #include <asm/mmu.h>
0014 #include <asm/page.h>
0015 #include <asm/pgtable.h>
0016 
0017 
0018 static pte_basic_t pte_update_delta(pte_t *ptep, unsigned long addr,
0019                     unsigned long old, unsigned long new)
0020 {
0021     return pte_update(&init_mm, addr, ptep, old & ~new, new & ~old, 0);
0022 }
0023 
0024 /*
0025  * Updates the attributes of a page atomically.
0026  *
0027  * This sequence is safe against concurrent updates, and also allows updating the
0028  * attributes of a page currently being executed or accessed.
0029  */
0030 static int change_page_attr(pte_t *ptep, unsigned long addr, void *data)
0031 {
0032     long action = (long)data;
0033 
0034     addr &= PAGE_MASK;
0035     /* modify the PTE bits as desired */
0036     switch (action) {
0037     case SET_MEMORY_RO:
0038         /* Don't clear DIRTY bit */
0039         pte_update_delta(ptep, addr, _PAGE_KERNEL_RW & ~_PAGE_DIRTY, _PAGE_KERNEL_RO);
0040         break;
0041     case SET_MEMORY_RW:
0042         pte_update_delta(ptep, addr, _PAGE_KERNEL_RO, _PAGE_KERNEL_RW);
0043         break;
0044     case SET_MEMORY_NX:
0045         pte_update_delta(ptep, addr, _PAGE_KERNEL_ROX, _PAGE_KERNEL_RO);
0046         break;
0047     case SET_MEMORY_X:
0048         pte_update_delta(ptep, addr, _PAGE_KERNEL_RO, _PAGE_KERNEL_ROX);
0049         break;
0050     case SET_MEMORY_NP:
0051         pte_update(&init_mm, addr, ptep, _PAGE_PRESENT, 0, 0);
0052         break;
0053     case SET_MEMORY_P:
0054         pte_update(&init_mm, addr, ptep, 0, _PAGE_PRESENT, 0);
0055         break;
0056     default:
0057         WARN_ON_ONCE(1);
0058         break;
0059     }
0060 
0061     /* See ptesync comment in radix__set_pte_at() */
0062     if (radix_enabled())
0063         asm volatile("ptesync": : :"memory");
0064 
0065     flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
0066 
0067     return 0;
0068 }
0069 
0070 int change_memory_attr(unsigned long addr, int numpages, long action)
0071 {
0072     unsigned long start = ALIGN_DOWN(addr, PAGE_SIZE);
0073     unsigned long size = numpages * PAGE_SIZE;
0074 
0075     if (!numpages)
0076         return 0;
0077 
0078     if (WARN_ON_ONCE(is_vmalloc_or_module_addr((void *)addr) &&
0079              is_vm_area_hugepages((void *)addr)))
0080         return -EINVAL;
0081 
0082 #ifdef CONFIG_PPC_BOOK3S_64
0083     /*
0084      * On hash, the linear mapping is not in the Linux page table so
0085      * apply_to_existing_page_range() will have no effect. If in the future
0086      * the set_memory_* functions are used on the linear map this will need
0087      * to be updated.
0088      */
0089     if (!radix_enabled()) {
0090         int region = get_region_id(addr);
0091 
0092         if (WARN_ON_ONCE(region != VMALLOC_REGION_ID && region != IO_REGION_ID))
0093             return -EINVAL;
0094     }
0095 #endif
0096 
0097     return apply_to_existing_page_range(&init_mm, start, size,
0098                         change_page_attr, (void *)action);
0099 }