powerpc/kvm/book3s_32_sr.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *
0004  * Copyright SUSE Linux Products GmbH 2009
0005  *
0006  * Authors: Alexander Graf <agraf@suse.de>
0007  */
0008
0009 /******************************************************************************
0010  *                                                                            *
0011  *                               Entry code                                   *
0012  *                                                                            *
0013  *****************************************************************************/
0014
0015 .macro LOAD_GUEST_SEGMENTS
0016
0017     /* Required state:
0018      *
0019      * MSR = ~IR|DR
0020      * R1 = host R1
0021      * R2 = host R2
0022      * R3 = shadow vcpu
0023      * all other volatile GPRS = free except R4, R6
0024      * SVCPU[CR]  = guest CR
0025      * SVCPU[XER] = guest XER
0026      * SVCPU[CTR] = guest CTR
0027      * SVCPU[LR]  = guest LR
0028      */
0029
0030 #define XCHG_SR(n)  lwz r9, (SVCPU_SR+(n*4))(r3);  \
0031             mtsr    n, r9
0032
0033     XCHG_SR(0)
0034     XCHG_SR(1)
0035     XCHG_SR(2)
0036     XCHG_SR(3)
0037     XCHG_SR(4)
0038     XCHG_SR(5)
0039     XCHG_SR(6)
0040     XCHG_SR(7)
0041     XCHG_SR(8)
0042     XCHG_SR(9)
0043     XCHG_SR(10)
0044     XCHG_SR(11)
0045     XCHG_SR(12)
0046     XCHG_SR(13)
0047     XCHG_SR(14)
0048     XCHG_SR(15)
0049
0050     /* Clear BATs. */
0051
0052 #define KVM_KILL_BAT(n, reg)        \
0053         mtspr   SPRN_IBAT##n##U,reg;    \
0054         mtspr   SPRN_IBAT##n##L,reg;    \
0055         mtspr   SPRN_DBAT##n##U,reg;    \
0056         mtspr   SPRN_DBAT##n##L,reg;    \
0057
0058         li  r9, 0
0059     KVM_KILL_BAT(0, r9)
0060     KVM_KILL_BAT(1, r9)
0061     KVM_KILL_BAT(2, r9)
0062     KVM_KILL_BAT(3, r9)
0063
0064 .endm
0065
0066 /******************************************************************************
0067  *                                                                            *
0068  *                               Exit code                                    *
0069  *                                                                            *
0070  *****************************************************************************/
0071
0072 .macro LOAD_HOST_SEGMENTS
0073
0074     /* Register usage at this point:
0075      *
0076      * R1         = host R1
0077      * R2         = host R2
0078      * R12        = exit handler id
0079      * R13        = shadow vcpu - SHADOW_VCPU_OFF
0080      * SVCPU.*    = guest *
0081      * SVCPU[CR]  = guest CR
0082      * SVCPU[XER] = guest XER
0083      * SVCPU[CTR] = guest CTR
0084      * SVCPU[LR]  = guest LR
0085      *
0086      */
0087
0088     /* Restore BATs */
0089
0090     /* We only overwrite the upper part, so we only restoree
0091        the upper part. */
0092 #define KVM_LOAD_BAT(n, reg, RA, RB)    \
0093     lwz RA,(n*16)+0(reg);   \
0094     lwz RB,(n*16)+4(reg);   \
0095     mtspr   SPRN_IBAT##n##U,RA; \
0096     mtspr   SPRN_IBAT##n##L,RB; \
0097     lwz RA,(n*16)+8(reg);   \
0098     lwz RB,(n*16)+12(reg);  \
0099     mtspr   SPRN_DBAT##n##U,RA; \
0100     mtspr   SPRN_DBAT##n##L,RB; \
0101
0102     lis     r9, BATS@ha
0103     addi    r9, r9, BATS@l
0104     tophys(r9, r9)
0105     KVM_LOAD_BAT(0, r9, r10, r11)
0106     KVM_LOAD_BAT(1, r9, r10, r11)
0107     KVM_LOAD_BAT(2, r9, r10, r11)
0108     KVM_LOAD_BAT(3, r9, r10, r11)
0109
0110     /* Restore Segment Registers */
0111
0112     /* 0xc - 0xf */
0113
0114         li      r0, 4
0115         mtctr   r0
0116     LOAD_REG_IMMEDIATE(r3, 0x20000000 | (0x111 * 0xc))
0117         lis     r4, 0xc000
0118 3:      mtsrin  r3, r4
0119         addi    r3, r3, 0x111     /* increment VSID */
0120         addis   r4, r4, 0x1000    /* address of next segment */
0121         bdnz    3b
0122
0123     /* 0x0 - 0xb */
0124
0125     /* switch_mmu_context() needs paging, let's enable it */
0126     mfmsr   r9
0127     ori     r11, r9, MSR_DR
0128     mtmsr   r11
0129     sync
0130
0131     /* switch_mmu_context() clobbers r12, rescue it */
0132     SAVE_GPR(12, r1)
0133
0134     /* Calling switch_mmu_context(<inv>, current->mm, <inv>); */
0135     lwz r4, MM(r2)
0136     bl  switch_mmu_context
0137
0138     /* restore r12 */
0139     REST_GPR(12, r1)
0140
0141     /* Disable paging again */
0142     mfmsr   r9
0143     li      r6, MSR_DR
0144     andc    r9, r9, r6
0145     mtmsr   r9
0146     sync
0147
0148 .endm