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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  * Copyright SUSE Linux Products GmbH 2009
0005  *
0006  * Authors: Alexander Graf <agraf@suse.de>
0007  */
0008 
0009 #include <linux/types.h>
0010 #include <linux/string.h>
0011 #include <linux/kvm.h>
0012 #include <linux/kvm_host.h>
0013 #include <linux/highmem.h>
0014 
0015 #include <asm/kvm_ppc.h>
0016 #include <asm/kvm_book3s.h>
0017 
0018 /* #define DEBUG_MMU */
0019 /* #define DEBUG_MMU_PTE */
0020 /* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
0021 
0022 #ifdef DEBUG_MMU
0023 #define dprintk(X...) printk(KERN_INFO X)
0024 #else
0025 #define dprintk(X...) do { } while(0)
0026 #endif
0027 
0028 #ifdef DEBUG_MMU_PTE
0029 #define dprintk_pte(X...) printk(KERN_INFO X)
0030 #else
0031 #define dprintk_pte(X...) do { } while(0)
0032 #endif
0033 
0034 #define PTEG_FLAG_ACCESSED  0x00000100
0035 #define PTEG_FLAG_DIRTY     0x00000080
0036 #ifndef SID_SHIFT
0037 #define SID_SHIFT       28
0038 #endif
0039 
0040 static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
0041 {
0042 #ifdef DEBUG_MMU_PTE_IP
0043     return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP;
0044 #else
0045     return true;
0046 #endif
0047 }
0048 
0049 static inline u32 sr_vsid(u32 sr_raw)
0050 {
0051     return sr_raw & 0x0fffffff;
0052 }
0053 
0054 static inline bool sr_valid(u32 sr_raw)
0055 {
0056     return (sr_raw & 0x80000000) ? false : true;
0057 }
0058 
0059 static inline bool sr_ks(u32 sr_raw)
0060 {
0061     return (sr_raw & 0x40000000) ? true: false;
0062 }
0063 
0064 static inline bool sr_kp(u32 sr_raw)
0065 {
0066     return (sr_raw & 0x20000000) ? true: false;
0067 }
0068 
0069 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
0070                       struct kvmppc_pte *pte, bool data,
0071                       bool iswrite);
0072 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
0073                          u64 *vsid);
0074 
0075 static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
0076 {
0077     return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
0078 }
0079 
0080 static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
0081                      bool data)
0082 {
0083     u64 vsid;
0084     struct kvmppc_pte pte;
0085 
0086     if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
0087         return pte.vpage;
0088 
0089     kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
0090     return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
0091 }
0092 
0093 static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
0094                       u32 sre, gva_t eaddr,
0095                       bool primary)
0096 {
0097     struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
0098     u32 page, hash, pteg, htabmask;
0099     hva_t r;
0100 
0101     page = (eaddr & 0x0FFFFFFF) >> 12;
0102     htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
0103 
0104     hash = ((sr_vsid(sre) ^ page) << 6);
0105     if (!primary)
0106         hash = ~hash;
0107     hash &= htabmask;
0108 
0109     pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
0110 
0111     dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
0112         kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
0113         sr_vsid(sre));
0114 
0115     r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
0116     if (kvm_is_error_hva(r))
0117         return r;
0118     return r | (pteg & ~PAGE_MASK);
0119 }
0120 
0121 static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
0122 {
0123     return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
0124            (primary ? 0 : 0x40) | 0x80000000;
0125 }
0126 
0127 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
0128                       struct kvmppc_pte *pte, bool data,
0129                       bool iswrite)
0130 {
0131     struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
0132     struct kvmppc_bat *bat;
0133     int i;
0134 
0135     for (i = 0; i < 8; i++) {
0136         if (data)
0137             bat = &vcpu_book3s->dbat[i];
0138         else
0139             bat = &vcpu_book3s->ibat[i];
0140 
0141         if (kvmppc_get_msr(vcpu) & MSR_PR) {
0142             if (!bat->vp)
0143                 continue;
0144         } else {
0145             if (!bat->vs)
0146                 continue;
0147         }
0148 
0149         if (check_debug_ip(vcpu))
0150         {
0151             dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
0152                     data ? 'd' : 'i', i, eaddr, bat->bepi,
0153                     bat->bepi_mask);
0154         }
0155         if ((eaddr & bat->bepi_mask) == bat->bepi) {
0156             u64 vsid;
0157             kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
0158                 eaddr >> SID_SHIFT, &vsid);
0159             vsid <<= 16;
0160             pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;
0161 
0162             pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
0163             pte->may_read = bat->pp;
0164             pte->may_write = bat->pp > 1;
0165             pte->may_execute = true;
0166             if (!pte->may_read) {
0167                 printk(KERN_INFO "BAT is not readable!\n");
0168                 continue;
0169             }
0170             if (iswrite && !pte->may_write) {
0171                 dprintk_pte("BAT is read-only!\n");
0172                 continue;
0173             }
0174 
0175             return 0;
0176         }
0177     }
0178 
0179     return -ENOENT;
0180 }
0181 
0182 static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
0183                      struct kvmppc_pte *pte, bool data,
0184                      bool iswrite, bool primary)
0185 {
0186     u32 sre;
0187     hva_t ptegp;
0188     u32 pteg[16];
0189     u32 pte0, pte1;
0190     u32 ptem = 0;
0191     int i;
0192     int found = 0;
0193 
0194     sre = find_sr(vcpu, eaddr);
0195 
0196     dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
0197             sr_vsid(sre), sre);
0198 
0199     pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
0200 
0201     ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
0202     if (kvm_is_error_hva(ptegp)) {
0203         printk(KERN_INFO "KVM: Invalid PTEG!\n");
0204         goto no_page_found;
0205     }
0206 
0207     ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
0208 
0209     if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
0210         printk_ratelimited(KERN_ERR
0211             "KVM: Can't copy data from 0x%lx!\n", ptegp);
0212         goto no_page_found;
0213     }
0214 
0215     for (i=0; i<16; i+=2) {
0216         pte0 = be32_to_cpu(pteg[i]);
0217         pte1 = be32_to_cpu(pteg[i + 1]);
0218         if (ptem == pte0) {
0219             u8 pp;
0220 
0221             pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
0222             pp = pte1 & 3;
0223 
0224             if ((sr_kp(sre) &&  (kvmppc_get_msr(vcpu) & MSR_PR)) ||
0225                 (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
0226                 pp |= 4;
0227 
0228             pte->may_write = false;
0229             pte->may_read = false;
0230             pte->may_execute = true;
0231             switch (pp) {
0232                 case 0:
0233                 case 1:
0234                 case 2:
0235                 case 6:
0236                     pte->may_write = true;
0237                     fallthrough;
0238                 case 3:
0239                 case 5:
0240                 case 7:
0241                     pte->may_read = true;
0242                     break;
0243             }
0244 
0245             dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
0246                     pte0, pte1, pp);
0247             found = 1;
0248             break;
0249         }
0250     }
0251 
0252     /* Update PTE C and A bits, so the guest's swapper knows we used the
0253        page */
0254     if (found) {
0255         u32 pte_r = pte1;
0256         char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));
0257 
0258         /*
0259          * Use single-byte writes to update the HPTE, to
0260          * conform to what real hardware does.
0261          */
0262         if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
0263             pte_r |= PTEG_FLAG_ACCESSED;
0264             put_user(pte_r >> 8, addr + 2);
0265         }
0266         if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
0267             pte_r |= PTEG_FLAG_DIRTY;
0268             put_user(pte_r, addr + 3);
0269         }
0270         if (!pte->may_read || (iswrite && !pte->may_write))
0271             return -EPERM;
0272         return 0;
0273     }
0274 
0275 no_page_found:
0276 
0277     if (check_debug_ip(vcpu)) {
0278         dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
0279                 to_book3s(vcpu)->sdr1, ptegp);
0280         for (i=0; i<16; i+=2) {
0281             dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
0282                     i, be32_to_cpu(pteg[i]),
0283                     be32_to_cpu(pteg[i+1]), ptem);
0284         }
0285     }
0286 
0287     return -ENOENT;
0288 }
0289 
0290 static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
0291                       struct kvmppc_pte *pte, bool data,
0292                       bool iswrite)
0293 {
0294     int r;
0295     ulong mp_ea = vcpu->arch.magic_page_ea;
0296 
0297     pte->eaddr = eaddr;
0298     pte->page_size = MMU_PAGE_4K;
0299 
0300     /* Magic page override */
0301     if (unlikely(mp_ea) &&
0302         unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
0303         !(kvmppc_get_msr(vcpu) & MSR_PR)) {
0304         pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
0305         pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
0306         pte->raddr &= KVM_PAM;
0307         pte->may_execute = true;
0308         pte->may_read = true;
0309         pte->may_write = true;
0310 
0311         return 0;
0312     }
0313 
0314     r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
0315     if (r < 0)
0316         r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
0317                            data, iswrite, true);
0318     if (r == -ENOENT)
0319         r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
0320                            data, iswrite, false);
0321 
0322     return r;
0323 }
0324 
0325 
0326 static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
0327 {
0328     return kvmppc_get_sr(vcpu, srnum);
0329 }
0330 
0331 static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
0332                     ulong value)
0333 {
0334     kvmppc_set_sr(vcpu, srnum, value);
0335     kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
0336 }
0337 
0338 static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
0339 {
0340     unsigned long i;
0341     struct kvm_vcpu *v;
0342 
0343     /* flush this VA on all cpus */
0344     kvm_for_each_vcpu(i, v, vcpu->kvm)
0345         kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
0346 }
0347 
0348 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
0349                          u64 *vsid)
0350 {
0351     ulong ea = esid << SID_SHIFT;
0352     u32 sr;
0353     u64 gvsid = esid;
0354     u64 msr = kvmppc_get_msr(vcpu);
0355 
0356     if (msr & (MSR_DR|MSR_IR)) {
0357         sr = find_sr(vcpu, ea);
0358         if (sr_valid(sr))
0359             gvsid = sr_vsid(sr);
0360     }
0361 
0362     /* In case we only have one of MSR_IR or MSR_DR set, let's put
0363        that in the real-mode context (and hope RM doesn't access
0364        high memory) */
0365     switch (msr & (MSR_DR|MSR_IR)) {
0366     case 0:
0367         *vsid = VSID_REAL | esid;
0368         break;
0369     case MSR_IR:
0370         *vsid = VSID_REAL_IR | gvsid;
0371         break;
0372     case MSR_DR:
0373         *vsid = VSID_REAL_DR | gvsid;
0374         break;
0375     case MSR_DR|MSR_IR:
0376         if (sr_valid(sr))
0377             *vsid = sr_vsid(sr);
0378         else
0379             *vsid = VSID_BAT | gvsid;
0380         break;
0381     default:
0382         BUG();
0383     }
0384 
0385     if (msr & MSR_PR)
0386         *vsid |= VSID_PR;
0387 
0388     return 0;
0389 }
0390 
0391 static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
0392 {
0393     return true;
0394 }
0395 
0396 
0397 void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
0398 {
0399     struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
0400 
0401     mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
0402     mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
0403     mmu->xlate = kvmppc_mmu_book3s_32_xlate;
0404     mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
0405     mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
0406     mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
0407     mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
0408 
0409     mmu->slbmte = NULL;
0410     mmu->slbmfee = NULL;
0411     mmu->slbmfev = NULL;
0412     mmu->slbfee = NULL;
0413     mmu->slbie = NULL;
0414     mmu->slbia = NULL;
0415 }
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