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0014 #include <linux/kvm_host.h>
0015 #include <linux/err.h>
0016 #include <linux/export.h>
0017 #include <linux/slab.h>
0018 #include <linux/module.h>
0019 #include <linux/miscdevice.h>
0020 #include <linux/gfp.h>
0021 #include <linux/sched.h>
0022 #include <linux/vmalloc.h>
0023 #include <linux/highmem.h>
0024
0025 #include <asm/reg.h>
0026 #include <asm/cputable.h>
0027 #include <asm/cacheflush.h>
0028 #include <linux/uaccess.h>
0029 #include <asm/io.h>
0030 #include <asm/kvm_ppc.h>
0031 #include <asm/kvm_book3s.h>
0032 #include <asm/mmu_context.h>
0033 #include <asm/page.h>
0034 #include <asm/xive.h>
0035
0036 #include "book3s.h"
0037 #include "trace.h"
0038
0039
0040
0041 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
0042 KVM_GENERIC_VM_STATS(),
0043 STATS_DESC_ICOUNTER(VM, num_2M_pages),
0044 STATS_DESC_ICOUNTER(VM, num_1G_pages)
0045 };
0046
0047 const struct kvm_stats_header kvm_vm_stats_header = {
0048 .name_size = KVM_STATS_NAME_SIZE,
0049 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
0050 .id_offset = sizeof(struct kvm_stats_header),
0051 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
0052 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
0053 sizeof(kvm_vm_stats_desc),
0054 };
0055
0056 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
0057 KVM_GENERIC_VCPU_STATS(),
0058 STATS_DESC_COUNTER(VCPU, sum_exits),
0059 STATS_DESC_COUNTER(VCPU, mmio_exits),
0060 STATS_DESC_COUNTER(VCPU, signal_exits),
0061 STATS_DESC_COUNTER(VCPU, light_exits),
0062 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
0063 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
0064 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
0065 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
0066 STATS_DESC_COUNTER(VCPU, syscall_exits),
0067 STATS_DESC_COUNTER(VCPU, isi_exits),
0068 STATS_DESC_COUNTER(VCPU, dsi_exits),
0069 STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
0070 STATS_DESC_COUNTER(VCPU, dec_exits),
0071 STATS_DESC_COUNTER(VCPU, ext_intr_exits),
0072 STATS_DESC_COUNTER(VCPU, halt_successful_wait),
0073 STATS_DESC_COUNTER(VCPU, dbell_exits),
0074 STATS_DESC_COUNTER(VCPU, gdbell_exits),
0075 STATS_DESC_COUNTER(VCPU, ld),
0076 STATS_DESC_COUNTER(VCPU, st),
0077 STATS_DESC_COUNTER(VCPU, pf_storage),
0078 STATS_DESC_COUNTER(VCPU, pf_instruc),
0079 STATS_DESC_COUNTER(VCPU, sp_storage),
0080 STATS_DESC_COUNTER(VCPU, sp_instruc),
0081 STATS_DESC_COUNTER(VCPU, queue_intr),
0082 STATS_DESC_COUNTER(VCPU, ld_slow),
0083 STATS_DESC_COUNTER(VCPU, st_slow),
0084 STATS_DESC_COUNTER(VCPU, pthru_all),
0085 STATS_DESC_COUNTER(VCPU, pthru_host),
0086 STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
0087 };
0088
0089 const struct kvm_stats_header kvm_vcpu_stats_header = {
0090 .name_size = KVM_STATS_NAME_SIZE,
0091 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
0092 .id_offset = sizeof(struct kvm_stats_header),
0093 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
0094 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
0095 sizeof(kvm_vcpu_stats_desc),
0096 };
0097
0098 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
0099 unsigned long pending_now, unsigned long old_pending)
0100 {
0101 if (is_kvmppc_hv_enabled(vcpu->kvm))
0102 return;
0103 if (pending_now)
0104 kvmppc_set_int_pending(vcpu, 1);
0105 else if (old_pending)
0106 kvmppc_set_int_pending(vcpu, 0);
0107 }
0108
0109 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
0110 {
0111 ulong crit_raw;
0112 ulong crit_r1;
0113 bool crit;
0114
0115 if (is_kvmppc_hv_enabled(vcpu->kvm))
0116 return false;
0117
0118 crit_raw = kvmppc_get_critical(vcpu);
0119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
0120
0121
0122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
0123 crit_raw &= 0xffffffff;
0124 crit_r1 &= 0xffffffff;
0125 }
0126
0127
0128 crit = (crit_raw == crit_r1);
0129
0130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
0131
0132 return crit;
0133 }
0134
0135 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
0136 {
0137 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
0138 }
0139
0140 static int kvmppc_book3s_vec2irqprio(unsigned int vec)
0141 {
0142 unsigned int prio;
0143
0144 switch (vec) {
0145 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
0146 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
0147 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
0148 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
0149 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
0150 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
0151 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
0152 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
0153 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
0154 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
0155 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
0156 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
0157 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
0158 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
0159 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
0160 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
0161 default: prio = BOOK3S_IRQPRIO_MAX; break;
0162 }
0163
0164 return prio;
0165 }
0166
0167 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
0168 unsigned int vec)
0169 {
0170 unsigned long old_pending = vcpu->arch.pending_exceptions;
0171
0172 clear_bit(kvmppc_book3s_vec2irqprio(vec),
0173 &vcpu->arch.pending_exceptions);
0174
0175 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
0176 old_pending);
0177 }
0178
0179 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
0180 {
0181 vcpu->stat.queue_intr++;
0182
0183 set_bit(kvmppc_book3s_vec2irqprio(vec),
0184 &vcpu->arch.pending_exceptions);
0185 #ifdef EXIT_DEBUG
0186 printk(KERN_INFO "Queueing interrupt %x\n", vec);
0187 #endif
0188 }
0189 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
0190
0191 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
0192 {
0193
0194 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
0195 }
0196 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
0197
0198 void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu)
0199 {
0200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0);
0201 }
0202 EXPORT_SYMBOL(kvmppc_core_queue_syscall);
0203
0204 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
0205 {
0206
0207 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
0208 }
0209 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
0210
0211 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
0212 {
0213
0214 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
0215 }
0216
0217 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
0218 {
0219
0220 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
0221 }
0222
0223 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
0224 {
0225
0226 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
0227 }
0228
0229 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
0230 {
0231 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
0232 }
0233 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
0234
0235 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
0236 {
0237 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
0238 }
0239 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
0240
0241 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
0242 {
0243 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
0244 }
0245 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
0246
0247 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
0248 struct kvm_interrupt *irq)
0249 {
0250
0251
0252
0253
0254
0255
0256
0257
0258
0259
0260
0261
0262
0263
0264
0265
0266
0267
0268
0269
0270 if (irq->irq == KVM_INTERRUPT_SET)
0271 vcpu->arch.external_oneshot = 1;
0272
0273 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
0274 }
0275
0276 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
0277 {
0278 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
0279 }
0280
0281 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
0282 ulong flags)
0283 {
0284 kvmppc_set_dar(vcpu, dar);
0285 kvmppc_set_dsisr(vcpu, flags);
0286 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
0287 }
0288 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
0289
0290 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
0291 {
0292 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
0293 }
0294 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
0295
0296 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
0297 unsigned int priority)
0298 {
0299 int deliver = 1;
0300 int vec = 0;
0301 bool crit = kvmppc_critical_section(vcpu);
0302
0303 switch (priority) {
0304 case BOOK3S_IRQPRIO_DECREMENTER:
0305 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
0306 vec = BOOK3S_INTERRUPT_DECREMENTER;
0307 break;
0308 case BOOK3S_IRQPRIO_EXTERNAL:
0309 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
0310 vec = BOOK3S_INTERRUPT_EXTERNAL;
0311 break;
0312 case BOOK3S_IRQPRIO_SYSTEM_RESET:
0313 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
0314 break;
0315 case BOOK3S_IRQPRIO_MACHINE_CHECK:
0316 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
0317 break;
0318 case BOOK3S_IRQPRIO_DATA_STORAGE:
0319 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
0320 break;
0321 case BOOK3S_IRQPRIO_INST_STORAGE:
0322 vec = BOOK3S_INTERRUPT_INST_STORAGE;
0323 break;
0324 case BOOK3S_IRQPRIO_DATA_SEGMENT:
0325 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
0326 break;
0327 case BOOK3S_IRQPRIO_INST_SEGMENT:
0328 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
0329 break;
0330 case BOOK3S_IRQPRIO_ALIGNMENT:
0331 vec = BOOK3S_INTERRUPT_ALIGNMENT;
0332 break;
0333 case BOOK3S_IRQPRIO_PROGRAM:
0334 vec = BOOK3S_INTERRUPT_PROGRAM;
0335 break;
0336 case BOOK3S_IRQPRIO_VSX:
0337 vec = BOOK3S_INTERRUPT_VSX;
0338 break;
0339 case BOOK3S_IRQPRIO_ALTIVEC:
0340 vec = BOOK3S_INTERRUPT_ALTIVEC;
0341 break;
0342 case BOOK3S_IRQPRIO_FP_UNAVAIL:
0343 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
0344 break;
0345 case BOOK3S_IRQPRIO_SYSCALL:
0346 vec = BOOK3S_INTERRUPT_SYSCALL;
0347 break;
0348 case BOOK3S_IRQPRIO_DEBUG:
0349 vec = BOOK3S_INTERRUPT_TRACE;
0350 break;
0351 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
0352 vec = BOOK3S_INTERRUPT_PERFMON;
0353 break;
0354 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
0355 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
0356 break;
0357 default:
0358 deliver = 0;
0359 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
0360 break;
0361 }
0362
0363 #if 0
0364 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
0365 #endif
0366
0367 if (deliver)
0368 kvmppc_inject_interrupt(vcpu, vec, 0);
0369
0370 return deliver;
0371 }
0372
0373
0374
0375
0376 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
0377 {
0378 switch (priority) {
0379 case BOOK3S_IRQPRIO_DECREMENTER:
0380
0381 return false;
0382 case BOOK3S_IRQPRIO_EXTERNAL:
0383
0384
0385
0386
0387
0388 if (vcpu->arch.external_oneshot) {
0389 vcpu->arch.external_oneshot = 0;
0390 return true;
0391 }
0392 return false;
0393 }
0394
0395 return true;
0396 }
0397
0398 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
0399 {
0400 unsigned long *pending = &vcpu->arch.pending_exceptions;
0401 unsigned long old_pending = vcpu->arch.pending_exceptions;
0402 unsigned int priority;
0403
0404 #ifdef EXIT_DEBUG
0405 if (vcpu->arch.pending_exceptions)
0406 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
0407 #endif
0408 priority = __ffs(*pending);
0409 while (priority < BOOK3S_IRQPRIO_MAX) {
0410 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
0411 clear_irqprio(vcpu, priority)) {
0412 clear_bit(priority, &vcpu->arch.pending_exceptions);
0413 break;
0414 }
0415
0416 priority = find_next_bit(pending,
0417 BITS_PER_BYTE * sizeof(*pending),
0418 priority + 1);
0419 }
0420
0421
0422 kvmppc_update_int_pending(vcpu, *pending, old_pending);
0423
0424 return 0;
0425 }
0426 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
0427
0428 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
0429 bool *writable)
0430 {
0431 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
0432 gfn_t gfn = gpa >> PAGE_SHIFT;
0433
0434 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
0435 mp_pa = (uint32_t)mp_pa;
0436
0437
0438 gpa &= ~0xFFFULL;
0439 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
0440 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
0441 kvm_pfn_t pfn;
0442
0443 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
0444 get_page(pfn_to_page(pfn));
0445 if (writable)
0446 *writable = true;
0447 return pfn;
0448 }
0449
0450 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
0451 }
0452 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
0453
0454 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
0455 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
0456 {
0457 bool data = (xlid == XLATE_DATA);
0458 bool iswrite = (xlrw == XLATE_WRITE);
0459 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
0460 int r;
0461
0462 if (relocated) {
0463 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
0464 } else {
0465 pte->eaddr = eaddr;
0466 pte->raddr = eaddr & KVM_PAM;
0467 pte->vpage = VSID_REAL | eaddr >> 12;
0468 pte->may_read = true;
0469 pte->may_write = true;
0470 pte->may_execute = true;
0471 r = 0;
0472
0473 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
0474 !data) {
0475 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
0476 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
0477 pte->raddr &= ~SPLIT_HACK_MASK;
0478 }
0479 }
0480
0481 return r;
0482 }
0483
0484 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
0485 enum instruction_fetch_type type, u32 *inst)
0486 {
0487 ulong pc = kvmppc_get_pc(vcpu);
0488 int r;
0489
0490 if (type == INST_SC)
0491 pc -= 4;
0492
0493 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
0494 if (r == EMULATE_DONE)
0495 return r;
0496 else
0497 return EMULATE_AGAIN;
0498 }
0499 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
0500
0501 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
0502 {
0503 return 0;
0504 }
0505
0506 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
0507 {
0508 }
0509
0510 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
0511 struct kvm_sregs *sregs)
0512 {
0513 int ret;
0514
0515 vcpu_load(vcpu);
0516 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
0517 vcpu_put(vcpu);
0518
0519 return ret;
0520 }
0521
0522 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
0523 struct kvm_sregs *sregs)
0524 {
0525 int ret;
0526
0527 vcpu_load(vcpu);
0528 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
0529 vcpu_put(vcpu);
0530
0531 return ret;
0532 }
0533
0534 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
0535 {
0536 int i;
0537
0538 regs->pc = kvmppc_get_pc(vcpu);
0539 regs->cr = kvmppc_get_cr(vcpu);
0540 regs->ctr = kvmppc_get_ctr(vcpu);
0541 regs->lr = kvmppc_get_lr(vcpu);
0542 regs->xer = kvmppc_get_xer(vcpu);
0543 regs->msr = kvmppc_get_msr(vcpu);
0544 regs->srr0 = kvmppc_get_srr0(vcpu);
0545 regs->srr1 = kvmppc_get_srr1(vcpu);
0546 regs->pid = vcpu->arch.pid;
0547 regs->sprg0 = kvmppc_get_sprg0(vcpu);
0548 regs->sprg1 = kvmppc_get_sprg1(vcpu);
0549 regs->sprg2 = kvmppc_get_sprg2(vcpu);
0550 regs->sprg3 = kvmppc_get_sprg3(vcpu);
0551 regs->sprg4 = kvmppc_get_sprg4(vcpu);
0552 regs->sprg5 = kvmppc_get_sprg5(vcpu);
0553 regs->sprg6 = kvmppc_get_sprg6(vcpu);
0554 regs->sprg7 = kvmppc_get_sprg7(vcpu);
0555
0556 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
0557 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
0558
0559 return 0;
0560 }
0561
0562 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
0563 {
0564 int i;
0565
0566 kvmppc_set_pc(vcpu, regs->pc);
0567 kvmppc_set_cr(vcpu, regs->cr);
0568 kvmppc_set_ctr(vcpu, regs->ctr);
0569 kvmppc_set_lr(vcpu, regs->lr);
0570 kvmppc_set_xer(vcpu, regs->xer);
0571 kvmppc_set_msr(vcpu, regs->msr);
0572 kvmppc_set_srr0(vcpu, regs->srr0);
0573 kvmppc_set_srr1(vcpu, regs->srr1);
0574 kvmppc_set_sprg0(vcpu, regs->sprg0);
0575 kvmppc_set_sprg1(vcpu, regs->sprg1);
0576 kvmppc_set_sprg2(vcpu, regs->sprg2);
0577 kvmppc_set_sprg3(vcpu, regs->sprg3);
0578 kvmppc_set_sprg4(vcpu, regs->sprg4);
0579 kvmppc_set_sprg5(vcpu, regs->sprg5);
0580 kvmppc_set_sprg6(vcpu, regs->sprg6);
0581 kvmppc_set_sprg7(vcpu, regs->sprg7);
0582
0583 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
0584 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
0585
0586 return 0;
0587 }
0588
0589 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
0590 {
0591 return -EOPNOTSUPP;
0592 }
0593
0594 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
0595 {
0596 return -EOPNOTSUPP;
0597 }
0598
0599 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
0600 union kvmppc_one_reg *val)
0601 {
0602 int r = 0;
0603 long int i;
0604
0605 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
0606 if (r == -EINVAL) {
0607 r = 0;
0608 switch (id) {
0609 case KVM_REG_PPC_DAR:
0610 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
0611 break;
0612 case KVM_REG_PPC_DSISR:
0613 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
0614 break;
0615 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
0616 i = id - KVM_REG_PPC_FPR0;
0617 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
0618 break;
0619 case KVM_REG_PPC_FPSCR:
0620 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
0621 break;
0622 #ifdef CONFIG_VSX
0623 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
0624 if (cpu_has_feature(CPU_FTR_VSX)) {
0625 i = id - KVM_REG_PPC_VSR0;
0626 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
0627 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
0628 } else {
0629 r = -ENXIO;
0630 }
0631 break;
0632 #endif
0633 case KVM_REG_PPC_DEBUG_INST:
0634 *val = get_reg_val(id, INS_TW);
0635 break;
0636 #ifdef CONFIG_KVM_XICS
0637 case KVM_REG_PPC_ICP_STATE:
0638 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
0639 r = -ENXIO;
0640 break;
0641 }
0642 if (xics_on_xive())
0643 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
0644 else
0645 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
0646 break;
0647 #endif
0648 #ifdef CONFIG_KVM_XIVE
0649 case KVM_REG_PPC_VP_STATE:
0650 if (!vcpu->arch.xive_vcpu) {
0651 r = -ENXIO;
0652 break;
0653 }
0654 if (xive_enabled())
0655 r = kvmppc_xive_native_get_vp(vcpu, val);
0656 else
0657 r = -ENXIO;
0658 break;
0659 #endif
0660 case KVM_REG_PPC_FSCR:
0661 *val = get_reg_val(id, vcpu->arch.fscr);
0662 break;
0663 case KVM_REG_PPC_TAR:
0664 *val = get_reg_val(id, vcpu->arch.tar);
0665 break;
0666 case KVM_REG_PPC_EBBHR:
0667 *val = get_reg_val(id, vcpu->arch.ebbhr);
0668 break;
0669 case KVM_REG_PPC_EBBRR:
0670 *val = get_reg_val(id, vcpu->arch.ebbrr);
0671 break;
0672 case KVM_REG_PPC_BESCR:
0673 *val = get_reg_val(id, vcpu->arch.bescr);
0674 break;
0675 case KVM_REG_PPC_IC:
0676 *val = get_reg_val(id, vcpu->arch.ic);
0677 break;
0678 default:
0679 r = -EINVAL;
0680 break;
0681 }
0682 }
0683
0684 return r;
0685 }
0686
0687 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
0688 union kvmppc_one_reg *val)
0689 {
0690 int r = 0;
0691 long int i;
0692
0693 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
0694 if (r == -EINVAL) {
0695 r = 0;
0696 switch (id) {
0697 case KVM_REG_PPC_DAR:
0698 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
0699 break;
0700 case KVM_REG_PPC_DSISR:
0701 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
0702 break;
0703 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
0704 i = id - KVM_REG_PPC_FPR0;
0705 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
0706 break;
0707 case KVM_REG_PPC_FPSCR:
0708 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
0709 break;
0710 #ifdef CONFIG_VSX
0711 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
0712 if (cpu_has_feature(CPU_FTR_VSX)) {
0713 i = id - KVM_REG_PPC_VSR0;
0714 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
0715 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
0716 } else {
0717 r = -ENXIO;
0718 }
0719 break;
0720 #endif
0721 #ifdef CONFIG_KVM_XICS
0722 case KVM_REG_PPC_ICP_STATE:
0723 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
0724 r = -ENXIO;
0725 break;
0726 }
0727 if (xics_on_xive())
0728 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
0729 else
0730 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
0731 break;
0732 #endif
0733 #ifdef CONFIG_KVM_XIVE
0734 case KVM_REG_PPC_VP_STATE:
0735 if (!vcpu->arch.xive_vcpu) {
0736 r = -ENXIO;
0737 break;
0738 }
0739 if (xive_enabled())
0740 r = kvmppc_xive_native_set_vp(vcpu, val);
0741 else
0742 r = -ENXIO;
0743 break;
0744 #endif
0745 case KVM_REG_PPC_FSCR:
0746 vcpu->arch.fscr = set_reg_val(id, *val);
0747 break;
0748 case KVM_REG_PPC_TAR:
0749 vcpu->arch.tar = set_reg_val(id, *val);
0750 break;
0751 case KVM_REG_PPC_EBBHR:
0752 vcpu->arch.ebbhr = set_reg_val(id, *val);
0753 break;
0754 case KVM_REG_PPC_EBBRR:
0755 vcpu->arch.ebbrr = set_reg_val(id, *val);
0756 break;
0757 case KVM_REG_PPC_BESCR:
0758 vcpu->arch.bescr = set_reg_val(id, *val);
0759 break;
0760 case KVM_REG_PPC_IC:
0761 vcpu->arch.ic = set_reg_val(id, *val);
0762 break;
0763 default:
0764 r = -EINVAL;
0765 break;
0766 }
0767 }
0768
0769 return r;
0770 }
0771
0772 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
0773 {
0774 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
0775 }
0776
0777 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
0778 {
0779 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
0780 }
0781
0782 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
0783 {
0784 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
0785 }
0786 EXPORT_SYMBOL_GPL(kvmppc_set_msr);
0787
0788 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
0789 {
0790 return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
0791 }
0792
0793 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
0794 struct kvm_translation *tr)
0795 {
0796 return 0;
0797 }
0798
0799 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
0800 struct kvm_guest_debug *dbg)
0801 {
0802 vcpu_load(vcpu);
0803 vcpu->guest_debug = dbg->control;
0804 vcpu_put(vcpu);
0805 return 0;
0806 }
0807
0808 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
0809 {
0810 kvmppc_core_queue_dec(vcpu);
0811 kvm_vcpu_kick(vcpu);
0812 }
0813
0814 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
0815 {
0816 return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
0817 }
0818
0819 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
0820 {
0821 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
0822 }
0823
0824 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
0825 {
0826 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
0827 }
0828
0829 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
0830 {
0831
0832 }
0833
0834 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
0835 {
0836 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
0837 }
0838
0839 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
0840 {
0841 kvm->arch.kvm_ops->free_memslot(slot);
0842 }
0843
0844 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
0845 {
0846 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
0847 }
0848
0849 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
0850 const struct kvm_memory_slot *old,
0851 struct kvm_memory_slot *new,
0852 enum kvm_mr_change change)
0853 {
0854 return kvm->arch.kvm_ops->prepare_memory_region(kvm, old, new, change);
0855 }
0856
0857 void kvmppc_core_commit_memory_region(struct kvm *kvm,
0858 struct kvm_memory_slot *old,
0859 const struct kvm_memory_slot *new,
0860 enum kvm_mr_change change)
0861 {
0862 kvm->arch.kvm_ops->commit_memory_region(kvm, old, new, change);
0863 }
0864
0865 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
0866 {
0867 return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range);
0868 }
0869
0870 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
0871 {
0872 return kvm->arch.kvm_ops->age_gfn(kvm, range);
0873 }
0874
0875 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
0876 {
0877 return kvm->arch.kvm_ops->test_age_gfn(kvm, range);
0878 }
0879
0880 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
0881 {
0882 return kvm->arch.kvm_ops->set_spte_gfn(kvm, range);
0883 }
0884
0885 int kvmppc_core_init_vm(struct kvm *kvm)
0886 {
0887
0888 #ifdef CONFIG_PPC64
0889 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
0890 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
0891 mutex_init(&kvm->arch.rtas_token_lock);
0892 #endif
0893
0894 return kvm->arch.kvm_ops->init_vm(kvm);
0895 }
0896
0897 void kvmppc_core_destroy_vm(struct kvm *kvm)
0898 {
0899 kvm->arch.kvm_ops->destroy_vm(kvm);
0900
0901 #ifdef CONFIG_PPC64
0902 kvmppc_rtas_tokens_free(kvm);
0903 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
0904 #endif
0905
0906 #ifdef CONFIG_KVM_XICS
0907
0908
0909
0910
0911 kfree(kvm->arch.xive_devices.native);
0912 kvm->arch.xive_devices.native = NULL;
0913 kfree(kvm->arch.xive_devices.xics_on_xive);
0914 kvm->arch.xive_devices.xics_on_xive = NULL;
0915 kfree(kvm->arch.xics_device);
0916 kvm->arch.xics_device = NULL;
0917 #endif
0918 }
0919
0920 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
0921 {
0922 unsigned long size = kvmppc_get_gpr(vcpu, 4);
0923 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
0924 u64 buf;
0925 int srcu_idx;
0926 int ret;
0927
0928 if (!is_power_of_2(size) || (size > sizeof(buf)))
0929 return H_TOO_HARD;
0930
0931 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
0932 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
0933 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
0934 if (ret != 0)
0935 return H_TOO_HARD;
0936
0937 switch (size) {
0938 case 1:
0939 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
0940 break;
0941
0942 case 2:
0943 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
0944 break;
0945
0946 case 4:
0947 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
0948 break;
0949
0950 case 8:
0951 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
0952 break;
0953
0954 default:
0955 BUG();
0956 }
0957
0958 return H_SUCCESS;
0959 }
0960 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
0961
0962 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
0963 {
0964 unsigned long size = kvmppc_get_gpr(vcpu, 4);
0965 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
0966 unsigned long val = kvmppc_get_gpr(vcpu, 6);
0967 u64 buf;
0968 int srcu_idx;
0969 int ret;
0970
0971 switch (size) {
0972 case 1:
0973 *(u8 *)&buf = val;
0974 break;
0975
0976 case 2:
0977 *(__be16 *)&buf = cpu_to_be16(val);
0978 break;
0979
0980 case 4:
0981 *(__be32 *)&buf = cpu_to_be32(val);
0982 break;
0983
0984 case 8:
0985 *(__be64 *)&buf = cpu_to_be64(val);
0986 break;
0987
0988 default:
0989 return H_TOO_HARD;
0990 }
0991
0992 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
0993 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
0994 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
0995 if (ret != 0)
0996 return H_TOO_HARD;
0997
0998 return H_SUCCESS;
0999 }
1000 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
1001
1002 int kvmppc_core_check_processor_compat(void)
1003 {
1004
1005
1006
1007
1008
1009 return 0;
1010 }
1011
1012 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
1013 {
1014 return kvm->arch.kvm_ops->hcall_implemented(hcall);
1015 }
1016
1017 #ifdef CONFIG_KVM_XICS
1018 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1019 bool line_status)
1020 {
1021 if (xics_on_xive())
1022 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1023 line_status);
1024 else
1025 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1026 line_status);
1027 }
1028
1029 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1030 struct kvm *kvm, int irq_source_id,
1031 int level, bool line_status)
1032 {
1033 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1034 level, line_status);
1035 }
1036 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1037 struct kvm *kvm, int irq_source_id, int level,
1038 bool line_status)
1039 {
1040 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1041 }
1042
1043 int kvm_irq_map_gsi(struct kvm *kvm,
1044 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1045 {
1046 entries->gsi = gsi;
1047 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1048 entries->set = kvmppc_book3s_set_irq;
1049 entries->irqchip.irqchip = 0;
1050 entries->irqchip.pin = gsi;
1051 return 1;
1052 }
1053
1054 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1055 {
1056 return pin;
1057 }
1058
1059 #endif
1060
1061 static int kvmppc_book3s_init(void)
1062 {
1063 int r;
1064
1065 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1066 if (r)
1067 return r;
1068 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1069 r = kvmppc_book3s_init_pr();
1070 #endif
1071
1072 #ifdef CONFIG_KVM_XICS
1073 #ifdef CONFIG_KVM_XIVE
1074 if (xics_on_xive()) {
1075 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1076 if (kvmppc_xive_native_supported())
1077 kvm_register_device_ops(&kvm_xive_native_ops,
1078 KVM_DEV_TYPE_XIVE);
1079 } else
1080 #endif
1081 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1082 #endif
1083 return r;
1084 }
1085
1086 static void kvmppc_book3s_exit(void)
1087 {
1088 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1089 kvmppc_book3s_exit_pr();
1090 #endif
1091 kvm_exit();
1092 }
1093
1094 module_init(kvmppc_book3s_init);
1095 module_exit(kvmppc_book3s_exit);
1096
1097
1098 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1099 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1100 MODULE_ALIAS("devname:kvm");
1101 #endif