powerpc/kernel/uprobes.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * User-space Probes (UProbes) for powerpc
0004  *
0005  * Copyright IBM Corporation, 2007-2012
0006  *
0007  * Adapted from the x86 port by Ananth N Mavinakayanahalli <ananth@in.ibm.com>
0008  */
0009 #include <linux/kernel.h>
0010 #include <linux/sched.h>
0011 #include <linux/ptrace.h>
0012 #include <linux/uprobes.h>
0013 #include <linux/uaccess.h>
0014 #include <linux/kdebug.h>
0015
0016 #include <asm/sstep.h>
0017 #include <asm/inst.h>
0018
0019 #define UPROBE_TRAP_NR  UINT_MAX
0020
0021 /**
0022  * is_trap_insn - check if the instruction is a trap variant
0023  * @insn: instruction to be checked.
0024  * Returns true if @insn is a trap variant.
0025  */
0026 bool is_trap_insn(uprobe_opcode_t *insn)
0027 {
0028     return (is_trap(*insn));
0029 }
0030
0031 /**
0032  * arch_uprobe_analyze_insn
0033  * @mm: the probed address space.
0034  * @arch_uprobe: the probepoint information.
0035  * @addr: vaddr to probe.
0036  * Return 0 on success or a -ve number on error.
0037  */
0038 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
0039         struct mm_struct *mm, unsigned long addr)
0040 {
0041     if (addr & 0x03)
0042         return -EINVAL;
0043
0044     if (cpu_has_feature(CPU_FTR_ARCH_31) &&
0045         ppc_inst_prefixed(ppc_inst_read(auprobe->insn)) &&
0046         (addr & 0x3f) == 60) {
0047         pr_info_ratelimited("Cannot register a uprobe on 64 byte unaligned prefixed instruction\n");
0048         return -EINVAL;
0049     }
0050
0051     if (!can_single_step(ppc_inst_val(ppc_inst_read(auprobe->insn)))) {
0052         pr_info_ratelimited("Cannot register a uprobe on instructions that can't be single stepped\n");
0053         return -ENOTSUPP;
0054     }
0055
0056     return 0;
0057 }
0058
0059 /*
0060  * arch_uprobe_pre_xol - prepare to execute out of line.
0061  * @auprobe: the probepoint information.
0062  * @regs: reflects the saved user state of current task.
0063  */
0064 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
0065 {
0066     struct arch_uprobe_task *autask = &current->utask->autask;
0067
0068     autask->saved_trap_nr = current->thread.trap_nr;
0069     current->thread.trap_nr = UPROBE_TRAP_NR;
0070     regs_set_return_ip(regs, current->utask->xol_vaddr);
0071
0072     user_enable_single_step(current);
0073     return 0;
0074 }
0075
0076 /**
0077  * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
0078  * @regs: Reflects the saved state of the task after it has hit a breakpoint
0079  * instruction.
0080  * Return the address of the breakpoint instruction.
0081  */
0082 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
0083 {
0084     return instruction_pointer(regs);
0085 }
0086
0087 /*
0088  * If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
0089  * then detect the case where a singlestepped instruction jumps back to its
0090  * own address. It is assumed that anything like do_page_fault/do_trap/etc
0091  * sets thread.trap_nr != UINT_MAX.
0092  *
0093  * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
0094  * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
0095  * UPROBE_TRAP_NR == UINT_MAX set by arch_uprobe_pre_xol().
0096  */
0097 bool arch_uprobe_xol_was_trapped(struct task_struct *t)
0098 {
0099     if (t->thread.trap_nr != UPROBE_TRAP_NR)
0100         return true;
0101
0102     return false;
0103 }
0104
0105 /*
0106  * Called after single-stepping. To avoid the SMP problems that can
0107  * occur when we temporarily put back the original opcode to
0108  * single-step, we single-stepped a copy of the instruction.
0109  *
0110  * This function prepares to resume execution after the single-step.
0111  */
0112 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
0113 {
0114     struct uprobe_task *utask = current->utask;
0115
0116     WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
0117
0118     current->thread.trap_nr = utask->autask.saved_trap_nr;
0119
0120     /*
0121      * On powerpc, except for loads and stores, most instructions
0122      * including ones that alter code flow (branches, calls, returns)
0123      * are emulated in the kernel. We get here only if the emulation
0124      * support doesn't exist and have to fix-up the next instruction
0125      * to be executed.
0126      */
0127     regs_set_return_ip(regs, (unsigned long)ppc_inst_next((void *)utask->vaddr, auprobe->insn));
0128
0129     user_disable_single_step(current);
0130     return 0;
0131 }
0132
0133 /* callback routine for handling exceptions. */
0134 int arch_uprobe_exception_notify(struct notifier_block *self,
0135                 unsigned long val, void *data)
0136 {
0137     struct die_args *args = data;
0138     struct pt_regs *regs = args->regs;
0139
0140     /* regs == NULL is a kernel bug */
0141     if (WARN_ON(!regs))
0142         return NOTIFY_DONE;
0143
0144     /* We are only interested in userspace traps */
0145     if (!user_mode(regs))
0146         return NOTIFY_DONE;
0147
0148     switch (val) {
0149     case DIE_BPT:
0150         if (uprobe_pre_sstep_notifier(regs))
0151             return NOTIFY_STOP;
0152         break;
0153     case DIE_SSTEP:
0154         if (uprobe_post_sstep_notifier(regs))
0155             return NOTIFY_STOP;
0156         break;
0157     default:
0158         break;
0159     }
0160     return NOTIFY_DONE;
0161 }
0162
0163 /*
0164  * This function gets called when XOL instruction either gets trapped or
0165  * the thread has a fatal signal, so reset the instruction pointer to its
0166  * probed address.
0167  */
0168 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
0169 {
0170     struct uprobe_task *utask = current->utask;
0171
0172     current->thread.trap_nr = utask->autask.saved_trap_nr;
0173     instruction_pointer_set(regs, utask->vaddr);
0174
0175     user_disable_single_step(current);
0176 }
0177
0178 /*
0179  * See if the instruction can be emulated.
0180  * Returns true if instruction was emulated, false otherwise.
0181  */
0182 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
0183 {
0184     int ret;
0185
0186     /*
0187      * emulate_step() returns 1 if the insn was successfully emulated.
0188      * For all other cases, we need to single-step in hardware.
0189      */
0190     ret = emulate_step(regs, ppc_inst_read(auprobe->insn));
0191     if (ret > 0)
0192         return true;
0193
0194     return false;
0195 }
0196
0197 unsigned long
0198 arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs)
0199 {
0200     unsigned long orig_ret_vaddr;
0201
0202     orig_ret_vaddr = regs->link;
0203
0204     /* Replace the return addr with trampoline addr */
0205     regs->link = trampoline_vaddr;
0206
0207     return orig_ret_vaddr;
0208 }
0209
0210 bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx,
0211                 struct pt_regs *regs)
0212 {
0213     if (ctx == RP_CHECK_CHAIN_CALL)
0214         return regs->gpr[1] <= ret->stack;
0215     else
0216         return regs->gpr[1] < ret->stack;
0217 }