powerpc/kernel/pci_64.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Port for PPC64 David Engebretsen, IBM Corp.
0004  * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
0005  *
0006  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
0007  *   Rework, based on alpha PCI code.
0008  */
0009
0010 #undef DEBUG
0011
0012 #include <linux/kernel.h>
0013 #include <linux/pci.h>
0014 #include <linux/string.h>
0015 #include <linux/init.h>
0016 #include <linux/export.h>
0017 #include <linux/mm.h>
0018 #include <linux/list.h>
0019 #include <linux/syscalls.h>
0020 #include <linux/irq.h>
0021 #include <linux/vmalloc.h>
0022 #include <linux/of.h>
0023
0024 #include <asm/processor.h>
0025 #include <asm/io.h>
0026 #include <asm/pci-bridge.h>
0027 #include <asm/byteorder.h>
0028 #include <asm/machdep.h>
0029 #include <asm/ppc-pci.h>
0030
0031 /* pci_io_base -- the base address from which io bars are offsets.
0032  * This is the lowest I/O base address (so bar values are always positive),
0033  * and it *must* be the start of ISA space if an ISA bus exists because
0034  * ISA drivers use hard coded offsets.  If no ISA bus exists nothing
0035  * is mapped on the first 64K of IO space
0036  */
0037 unsigned long pci_io_base;
0038 EXPORT_SYMBOL(pci_io_base);
0039
0040 static int __init pcibios_init(void)
0041 {
0042     struct pci_controller *hose, *tmp;
0043
0044     printk(KERN_INFO "PCI: Probing PCI hardware\n");
0045
0046     /* For now, override phys_mem_access_prot. If we need it,g
0047      * later, we may move that initialization to each ppc_md
0048      */
0049     ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
0050
0051     /* On ppc64, we always enable PCI domains and we keep domain 0
0052      * backward compatible in /proc for video cards
0053      */
0054     pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);
0055
0056     /* Scan all of the recorded PCI controllers.  */
0057     list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
0058         pcibios_scan_phb(hose);
0059
0060     /* Call common code to handle resource allocation */
0061     pcibios_resource_survey();
0062
0063     /* Add devices. */
0064     list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
0065         pci_bus_add_devices(hose->bus);
0066
0067     /* Call machine dependent fixup */
0068     if (ppc_md.pcibios_fixup)
0069         ppc_md.pcibios_fixup();
0070
0071     printk(KERN_DEBUG "PCI: Probing PCI hardware done\n");
0072
0073     return 0;
0074 }
0075
0076 subsys_initcall(pcibios_init);
0077
0078 int pcibios_unmap_io_space(struct pci_bus *bus)
0079 {
0080     struct pci_controller *hose;
0081
0082     WARN_ON(bus == NULL);
0083
0084     /* If this is not a PHB, we only flush the hash table over
0085      * the area mapped by this bridge. We don't play with the PTE
0086      * mappings since we might have to deal with sub-page alignments
0087      * so flushing the hash table is the only sane way to make sure
0088      * that no hash entries are covering that removed bridge area
0089      * while still allowing other busses overlapping those pages
0090      *
0091      * Note: If we ever support P2P hotplug on Book3E, we'll have
0092      * to do an appropriate TLB flush here too
0093      */
0094     if (bus->self) {
0095 #ifdef CONFIG_PPC_BOOK3S_64
0096         struct resource *res = bus->resource[0];
0097 #endif
0098
0099         pr_debug("IO unmapping for PCI-PCI bridge %s\n",
0100              pci_name(bus->self));
0101
0102 #ifdef CONFIG_PPC_BOOK3S_64
0103         __flush_hash_table_range(res->start + _IO_BASE,
0104                      res->end + _IO_BASE + 1);
0105 #endif
0106         return 0;
0107     }
0108
0109     /* Get the host bridge */
0110     hose = pci_bus_to_host(bus);
0111
0112     pr_debug("IO unmapping for PHB %pOF\n", hose->dn);
0113     pr_debug("  alloc=0x%p\n", hose->io_base_alloc);
0114
0115     iounmap(hose->io_base_alloc);
0116     return 0;
0117 }
0118 EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
0119
0120 void __iomem *ioremap_phb(phys_addr_t paddr, unsigned long size)
0121 {
0122     struct vm_struct *area;
0123     unsigned long addr;
0124
0125     WARN_ON_ONCE(paddr & ~PAGE_MASK);
0126     WARN_ON_ONCE(size & ~PAGE_MASK);
0127
0128     /*
0129      * Let's allocate some IO space for that guy. We don't pass VM_IOREMAP
0130      * because we don't care about alignment tricks that the core does in
0131      * that case.  Maybe we should due to stupid card with incomplete
0132      * address decoding but I'd rather not deal with those outside of the
0133      * reserved 64K legacy region.
0134      */
0135     area = __get_vm_area_caller(size, 0, PHB_IO_BASE, PHB_IO_END,
0136                     __builtin_return_address(0));
0137     if (!area)
0138         return NULL;
0139
0140     addr = (unsigned long)area->addr;
0141     if (ioremap_page_range(addr, addr + size, paddr,
0142             pgprot_noncached(PAGE_KERNEL))) {
0143         vunmap_range(addr, addr + size);
0144         return NULL;
0145     }
0146
0147     return (void __iomem *)addr;
0148 }
0149 EXPORT_SYMBOL_GPL(ioremap_phb);
0150
0151 static int pcibios_map_phb_io_space(struct pci_controller *hose)
0152 {
0153     unsigned long phys_page;
0154     unsigned long size_page;
0155     unsigned long io_virt_offset;
0156
0157     phys_page = ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE);
0158     size_page = ALIGN(hose->pci_io_size, PAGE_SIZE);
0159
0160     /* Make sure IO area address is clear */
0161     hose->io_base_alloc = NULL;
0162
0163     /* If there's no IO to map on that bus, get away too */
0164     if (hose->pci_io_size == 0 || hose->io_base_phys == 0)
0165         return 0;
0166
0167     /* Let's allocate some IO space for that guy. We don't pass
0168      * VM_IOREMAP because we don't care about alignment tricks that
0169      * the core does in that case. Maybe we should due to stupid card
0170      * with incomplete address decoding but I'd rather not deal with
0171      * those outside of the reserved 64K legacy region.
0172      */
0173     hose->io_base_alloc = ioremap_phb(phys_page, size_page);
0174     if (!hose->io_base_alloc)
0175         return -ENOMEM;
0176     hose->io_base_virt = hose->io_base_alloc +
0177                 hose->io_base_phys - phys_page;
0178
0179     pr_debug("IO mapping for PHB %pOF\n", hose->dn);
0180     pr_debug("  phys=0x%016llx, virt=0x%p (alloc=0x%p)\n",
0181          hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
0182     pr_debug("  size=0x%016llx (alloc=0x%016lx)\n",
0183          hose->pci_io_size, size_page);
0184
0185     /* Fixup hose IO resource */
0186     io_virt_offset = pcibios_io_space_offset(hose);
0187     hose->io_resource.start += io_virt_offset;
0188     hose->io_resource.end += io_virt_offset;
0189
0190     pr_debug("  hose->io_resource=%pR\n", &hose->io_resource);
0191
0192     return 0;
0193 }
0194
0195 int pcibios_map_io_space(struct pci_bus *bus)
0196 {
0197     WARN_ON(bus == NULL);
0198
0199     /* If this not a PHB, nothing to do, page tables still exist and
0200      * thus HPTEs will be faulted in when needed
0201      */
0202     if (bus->self) {
0203         pr_debug("IO mapping for PCI-PCI bridge %s\n",
0204              pci_name(bus->self));
0205         pr_debug("  virt=0x%016llx...0x%016llx\n",
0206              bus->resource[0]->start + _IO_BASE,
0207              bus->resource[0]->end + _IO_BASE);
0208         return 0;
0209     }
0210
0211     return pcibios_map_phb_io_space(pci_bus_to_host(bus));
0212 }
0213 EXPORT_SYMBOL_GPL(pcibios_map_io_space);
0214
0215 void pcibios_setup_phb_io_space(struct pci_controller *hose)
0216 {
0217     pcibios_map_phb_io_space(hose);
0218 }
0219
0220 #define IOBASE_BRIDGE_NUMBER    0
0221 #define IOBASE_MEMORY       1
0222 #define IOBASE_IO       2
0223 #define IOBASE_ISA_IO       3
0224 #define IOBASE_ISA_MEM      4
0225
0226 SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, in_bus,
0227               unsigned long, in_devfn)
0228 {
0229     struct pci_controller* hose;
0230     struct pci_bus *tmp_bus, *bus = NULL;
0231     struct device_node *hose_node;
0232
0233     /* Argh ! Please forgive me for that hack, but that's the
0234      * simplest way to get existing XFree to not lockup on some
0235      * G5 machines... So when something asks for bus 0 io base
0236      * (bus 0 is HT root), we return the AGP one instead.
0237      */
0238     if (in_bus == 0 && of_machine_is_compatible("MacRISC4")) {
0239         struct device_node *agp;
0240
0241         agp = of_find_compatible_node(NULL, NULL, "u3-agp");
0242         if (agp)
0243             in_bus = 0xf0;
0244         of_node_put(agp);
0245     }
0246
0247     /* That syscall isn't quite compatible with PCI domains, but it's
0248      * used on pre-domains setup. We return the first match
0249      */
0250
0251     list_for_each_entry(tmp_bus, &pci_root_buses, node) {
0252         if (in_bus >= tmp_bus->number &&
0253             in_bus <= tmp_bus->busn_res.end) {
0254             bus = tmp_bus;
0255             break;
0256         }
0257     }
0258     if (bus == NULL || bus->dev.of_node == NULL)
0259         return -ENODEV;
0260
0261     hose_node = bus->dev.of_node;
0262     hose = PCI_DN(hose_node)->phb;
0263
0264     switch (which) {
0265     case IOBASE_BRIDGE_NUMBER:
0266         return (long)hose->first_busno;
0267     case IOBASE_MEMORY:
0268         return (long)hose->mem_offset[0];
0269     case IOBASE_IO:
0270         return (long)hose->io_base_phys;
0271     case IOBASE_ISA_IO:
0272         return (long)isa_io_base;
0273     case IOBASE_ISA_MEM:
0274         return -EINVAL;
0275     }
0276
0277     return -EOPNOTSUPP;
0278 }
0279
0280 #ifdef CONFIG_NUMA
0281 int pcibus_to_node(struct pci_bus *bus)
0282 {
0283     struct pci_controller *phb = pci_bus_to_host(bus);
0284     return phb->node;
0285 }
0286 EXPORT_SYMBOL(pcibus_to_node);
0287 #endif
0288
0289 #ifdef CONFIG_PPC_PMAC
0290 int pci_device_from_OF_node(struct device_node *np, u8 *bus, u8 *devfn)
0291 {
0292     if (!PCI_DN(np))
0293         return -ENODEV;
0294     *bus = PCI_DN(np)->busno;
0295     *devfn = PCI_DN(np)->devfn;
0296     return 0;
0297 }
0298 #endif