uapi/asm/sigcontext.h

0001 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
0002 #ifndef _ASM_POWERPC_SIGCONTEXT_H
0003 #define _ASM_POWERPC_SIGCONTEXT_H
0004
0005 /*
0006  * This program is free software; you can redistribute it and/or
0007  * modify it under the terms of the GNU General Public License
0008  * as published by the Free Software Foundation; either version
0009  * 2 of the License, or (at your option) any later version.
0010  */
0011 #include <linux/compiler.h>
0012 #include <asm/ptrace.h>
0013 #ifdef __powerpc64__
0014 #include <asm/elf.h>
0015 #endif
0016
0017 struct sigcontext {
0018     unsigned long   _unused[4];
0019     int     signal;
0020 #ifdef __powerpc64__
0021     int     _pad0;
0022 #endif
0023     unsigned long   handler;
0024     unsigned long   oldmask;
0025 #ifdef __KERNEL__
0026     struct user_pt_regs __user *regs;
0027 #else
0028     struct pt_regs  *regs;
0029 #endif
0030 #ifdef __powerpc64__
0031     elf_gregset_t   gp_regs;
0032     elf_fpregset_t  fp_regs;
0033 /*
0034  * To maintain compatibility with current implementations the sigcontext is
0035  * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
0036  * followed by an unstructured (vmx_reserve) field of 101 doublewords. This
0037  * allows the array of vector registers to be quadword aligned independent of
0038  * the alignment of the containing sigcontext or ucontext. It is the
0039  * responsibility of the code setting the sigcontext to set this pointer to
0040  * either NULL (if this processor does not support the VMX feature) or the
0041  * address of the first quadword within the allocated (vmx_reserve) area.
0042  *
0043  * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with
0044  * an array of 34 quadword entries (elf_vrregset_t).  The entries with
0045  * indexes 0-31 contain the corresponding vector registers.  The entry with
0046  * index 32 contains the vscr as the last word (offset 12) within the
0047  * quadword.  This allows the vscr to be stored as either a quadword (since
0048  * it must be copied via a vector register to/from storage) or as a word.
0049  * The entry with index 33 contains the vrsave as the first word (offset 0)
0050  * within the quadword.
0051  *
0052  * Part of the VSX data is stored here also by extending vmx_restore
0053  * by an additional 32 double words.  Architecturally the layout of
0054  * the VSR registers and how they overlap on top of the legacy FPR and
0055  * VR registers is shown below:
0056  *
0057  *                    VSR doubleword 0               VSR doubleword 1
0058  *           ----------------------------------------------------------------
0059  *   VSR[0]  |             FPR[0]            |                              |
0060  *           ----------------------------------------------------------------
0061  *   VSR[1]  |             FPR[1]            |                              |
0062  *           ----------------------------------------------------------------
0063  *           |              ...              |                              |
0064  *           |              ...              |                              |
0065  *           ----------------------------------------------------------------
0066  *   VSR[30] |             FPR[30]           |                              |
0067  *           ----------------------------------------------------------------
0068  *   VSR[31] |             FPR[31]           |                              |
0069  *           ----------------------------------------------------------------
0070  *   VSR[32] |                             VR[0]                            |
0071  *           ----------------------------------------------------------------
0072  *   VSR[33] |                             VR[1]                            |
0073  *           ----------------------------------------------------------------
0074  *           |                              ...                             |
0075  *           |                              ...                             |
0076  *           ----------------------------------------------------------------
0077  *   VSR[62] |                             VR[30]                           |
0078  *           ----------------------------------------------------------------
0079  *   VSR[63] |                             VR[31]                           |
0080  *           ----------------------------------------------------------------
0081  *
0082  * FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63
0083  * is stored at the start of vmx_reserve.  vmx_reserve is extended for
0084  * backwards compatility to store VSR 0-31 doubleword 1 after the VMX
0085  * registers and vscr/vrsave.
0086  */
0087     elf_vrreg_t __user *v_regs;
0088     long        vmx_reserve[ELF_NVRREG + ELF_NVRREG + 1 + 32];
0089 #endif
0090 };
0091
0092 #endif /* _ASM_POWERPC_SIGCONTEXT_H */