uapi/asm/elf.h

0001 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
0002 /*
0003  * ELF register definitions..
0004  *
0005  * This program is free software; you can redistribute it and/or
0006  * modify it under the terms of the GNU General Public License
0007  * as published by the Free Software Foundation; either version
0008  * 2 of the License, or (at your option) any later version.
0009  */
0010 #ifndef _UAPI_ASM_POWERPC_ELF_H
0011 #define _UAPI_ASM_POWERPC_ELF_H
0012
0013
0014 #include <linux/types.h>
0015
0016 #include <asm/ptrace.h>
0017 #include <asm/cputable.h>
0018 #include <asm/auxvec.h>
0019
0020 /* PowerPC relocations defined by the ABIs */
0021 #define R_PPC_NONE      0
0022 #define R_PPC_ADDR32        1   /* 32bit absolute address */
0023 #define R_PPC_ADDR24        2   /* 26bit address, 2 bits ignored.  */
0024 #define R_PPC_ADDR16        3   /* 16bit absolute address */
0025 #define R_PPC_ADDR16_LO     4   /* lower 16bit of absolute address */
0026 #define R_PPC_ADDR16_HI     5   /* high 16bit of absolute address */
0027 #define R_PPC_ADDR16_HA     6   /* adjusted high 16bit */
0028 #define R_PPC_ADDR14        7   /* 16bit address, 2 bits ignored */
0029 #define R_PPC_ADDR14_BRTAKEN    8
0030 #define R_PPC_ADDR14_BRNTAKEN   9
0031 #define R_PPC_REL24     10  /* PC relative 26 bit */
0032 #define R_PPC_REL14     11  /* PC relative 16 bit */
0033 #define R_PPC_REL14_BRTAKEN 12
0034 #define R_PPC_REL14_BRNTAKEN    13
0035 #define R_PPC_GOT16     14
0036 #define R_PPC_GOT16_LO      15
0037 #define R_PPC_GOT16_HI      16
0038 #define R_PPC_GOT16_HA      17
0039 #define R_PPC_PLTREL24      18
0040 #define R_PPC_COPY      19
0041 #define R_PPC_GLOB_DAT      20
0042 #define R_PPC_JMP_SLOT      21
0043 #define R_PPC_RELATIVE      22
0044 #define R_PPC_LOCAL24PC     23
0045 #define R_PPC_UADDR32       24
0046 #define R_PPC_UADDR16       25
0047 #define R_PPC_REL32     26
0048 #define R_PPC_PLT32     27
0049 #define R_PPC_PLTREL32      28
0050 #define R_PPC_PLT16_LO      29
0051 #define R_PPC_PLT16_HI      30
0052 #define R_PPC_PLT16_HA      31
0053 #define R_PPC_SDAREL16      32
0054 #define R_PPC_SECTOFF       33
0055 #define R_PPC_SECTOFF_LO    34
0056 #define R_PPC_SECTOFF_HI    35
0057 #define R_PPC_SECTOFF_HA    36
0058
0059 /* PowerPC relocations defined for the TLS access ABI.  */
0060 #define R_PPC_TLS       67 /* none  (sym+add)@tls */
0061 #define R_PPC_DTPMOD32      68 /* word32    (sym+add)@dtpmod */
0062 #define R_PPC_TPREL16       69 /* half16*   (sym+add)@tprel */
0063 #define R_PPC_TPREL16_LO    70 /* half16    (sym+add)@tprel@l */
0064 #define R_PPC_TPREL16_HI    71 /* half16    (sym+add)@tprel@h */
0065 #define R_PPC_TPREL16_HA    72 /* half16    (sym+add)@tprel@ha */
0066 #define R_PPC_TPREL32       73 /* word32    (sym+add)@tprel */
0067 #define R_PPC_DTPREL16      74 /* half16*   (sym+add)@dtprel */
0068 #define R_PPC_DTPREL16_LO   75 /* half16    (sym+add)@dtprel@l */
0069 #define R_PPC_DTPREL16_HI   76 /* half16    (sym+add)@dtprel@h */
0070 #define R_PPC_DTPREL16_HA   77 /* half16    (sym+add)@dtprel@ha */
0071 #define R_PPC_DTPREL32      78 /* word32    (sym+add)@dtprel */
0072 #define R_PPC_GOT_TLSGD16   79 /* half16*   (sym+add)@got@tlsgd */
0073 #define R_PPC_GOT_TLSGD16_LO    80 /* half16    (sym+add)@got@tlsgd@l */
0074 #define R_PPC_GOT_TLSGD16_HI    81 /* half16    (sym+add)@got@tlsgd@h */
0075 #define R_PPC_GOT_TLSGD16_HA    82 /* half16    (sym+add)@got@tlsgd@ha */
0076 #define R_PPC_GOT_TLSLD16   83 /* half16*   (sym+add)@got@tlsld */
0077 #define R_PPC_GOT_TLSLD16_LO    84 /* half16    (sym+add)@got@tlsld@l */
0078 #define R_PPC_GOT_TLSLD16_HI    85 /* half16    (sym+add)@got@tlsld@h */
0079 #define R_PPC_GOT_TLSLD16_HA    86 /* half16    (sym+add)@got@tlsld@ha */
0080 #define R_PPC_GOT_TPREL16   87 /* half16*   (sym+add)@got@tprel */
0081 #define R_PPC_GOT_TPREL16_LO    88 /* half16    (sym+add)@got@tprel@l */
0082 #define R_PPC_GOT_TPREL16_HI    89 /* half16    (sym+add)@got@tprel@h */
0083 #define R_PPC_GOT_TPREL16_HA    90 /* half16    (sym+add)@got@tprel@ha */
0084 #define R_PPC_GOT_DTPREL16  91 /* half16*   (sym+add)@got@dtprel */
0085 #define R_PPC_GOT_DTPREL16_LO   92 /* half16*   (sym+add)@got@dtprel@l */
0086 #define R_PPC_GOT_DTPREL16_HI   93 /* half16*   (sym+add)@got@dtprel@h */
0087 #define R_PPC_GOT_DTPREL16_HA   94 /* half16*   (sym+add)@got@dtprel@ha */
0088
0089 /* keep this the last entry. */
0090 #define R_PPC_NUM       95
0091
0092
0093 #define ELF_NGREG   48  /* includes nip, msr, lr, etc. */
0094 #define ELF_NFPREG  33  /* includes fpscr */
0095 #define ELF_NVMX    34  /* includes all vector registers */
0096 #define ELF_NVSX    32  /* includes all VSX registers */
0097 #define ELF_NTMSPRREG   3   /* include tfhar, tfiar, texasr */
0098 #define ELF_NEBB    3   /* includes ebbrr, ebbhr, bescr */
0099 #define ELF_NPMU    5   /* includes siar, sdar, sier, mmcr2, mmcr0 */
0100 #define ELF_NPKEY   3   /* includes amr, iamr, uamor */
0101
0102 typedef unsigned long elf_greg_t64;
0103 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
0104
0105 typedef unsigned int elf_greg_t32;
0106 typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
0107 typedef elf_gregset_t32 compat_elf_gregset_t;
0108
0109 /*
0110  * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
0111  */
0112 #ifdef __powerpc64__
0113 # define ELF_NVRREG32   33  /* includes vscr & vrsave stuffed together */
0114 # define ELF_NVRREG 34  /* includes vscr & vrsave in split vectors */
0115 # define ELF_NVSRHALFREG 32 /* Half the vsx registers */
0116 # define ELF_GREG_TYPE  elf_greg_t64
0117 # define ELF_ARCH   EM_PPC64
0118 # define ELF_CLASS  ELFCLASS64
0119 typedef elf_greg_t64 elf_greg_t;
0120 typedef elf_gregset_t64 elf_gregset_t;
0121 #else
0122 # define ELF_NEVRREG    34  /* includes acc (as 2) */
0123 # define ELF_NVRREG 33  /* includes vscr */
0124 # define ELF_GREG_TYPE  elf_greg_t32
0125 # define ELF_ARCH   EM_PPC
0126 # define ELF_CLASS  ELFCLASS32
0127 typedef elf_greg_t32 elf_greg_t;
0128 typedef elf_gregset_t32 elf_gregset_t;
0129 #endif /* __powerpc64__ */
0130
0131 #ifdef __BIG_ENDIAN__
0132 #define ELF_DATA    ELFDATA2MSB
0133 #else
0134 #define ELF_DATA    ELFDATA2LSB
0135 #endif
0136
0137 /* Floating point registers */
0138 typedef double elf_fpreg_t;
0139 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
0140
0141 /* Altivec registers */
0142 /*
0143  * The entries with indexes 0-31 contain the corresponding vector registers.
0144  * The entry with index 32 contains the vscr as the last word (offset 12)
0145  * within the quadword.  This allows the vscr to be stored as either a
0146  * quadword (since it must be copied via a vector register to/from storage)
0147  * or as a word.
0148  *
0149  * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
0150  * word (offset 0) within the quadword.
0151  *
0152  * This definition of the VMX state is compatible with the current PPC32
0153  * ptrace interface.  This allows signal handling and ptrace to use the same
0154  * structures.  This also simplifies the implementation of a bi-arch
0155  * (combined (32- and 64-bit) gdb.
0156  *
0157  * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
0158  * vrsave along with vscr and so only uses 33 vectors for the register set
0159  */
0160 typedef __vector128 elf_vrreg_t;
0161 typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
0162 #ifdef __powerpc64__
0163 typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
0164 typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
0165 #endif
0166
0167 /* PowerPC64 relocations defined by the ABIs */
0168 #define R_PPC64_NONE    R_PPC_NONE
0169 #define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
0170 #define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */
0171 #define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */
0172 #define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */
0173 #define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
0174 #define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */
0175 #define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */
0176 #define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN
0177 #define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
0178 #define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */
0179 #define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */
0180 #define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN
0181 #define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN
0182 #define R_PPC64_GOT16     R_PPC_GOT16
0183 #define R_PPC64_GOT16_LO  R_PPC_GOT16_LO
0184 #define R_PPC64_GOT16_HI  R_PPC_GOT16_HI
0185 #define R_PPC64_GOT16_HA  R_PPC_GOT16_HA
0186
0187 #define R_PPC64_COPY      R_PPC_COPY
0188 #define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT
0189 #define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT
0190 #define R_PPC64_RELATIVE  R_PPC_RELATIVE
0191
0192 #define R_PPC64_UADDR32   R_PPC_UADDR32
0193 #define R_PPC64_UADDR16   R_PPC_UADDR16
0194 #define R_PPC64_REL32     R_PPC_REL32
0195 #define R_PPC64_PLT32     R_PPC_PLT32
0196 #define R_PPC64_PLTREL32  R_PPC_PLTREL32
0197 #define R_PPC64_PLT16_LO  R_PPC_PLT16_LO
0198 #define R_PPC64_PLT16_HI  R_PPC_PLT16_HI
0199 #define R_PPC64_PLT16_HA  R_PPC_PLT16_HA
0200
0201 #define R_PPC64_SECTOFF     R_PPC_SECTOFF
0202 #define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO
0203 #define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI
0204 #define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA
0205 #define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */
0206 #define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */
0207 #define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */
0208 #define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */
0209 #define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */
0210 #define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */
0211 #define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */
0212 #define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */
0213 #define R_PPC64_PLT64       45  /* doubleword64 L + A.  */
0214 #define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */
0215 #define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */
0216 #define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */
0217 #define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */
0218 #define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */
0219 #define R_PPC64_TOC         51  /* doubleword64 .TOC. */
0220 #define R_PPC64_PLTGOT16    52  /* half16* M + A.  */
0221 #define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */
0222 #define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */
0223 #define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */
0224
0225 #define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */
0226 #define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */
0227 #define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */
0228 #define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */
0229 #define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */
0230 #define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */
0231 #define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */
0232 #define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */
0233 #define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */
0234 #define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */
0235 #define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */
0236
0237 /* PowerPC64 relocations defined for the TLS access ABI.  */
0238 #define R_PPC64_TLS     67 /* none  (sym+add)@tls */
0239 #define R_PPC64_DTPMOD64    68 /* doubleword64 (sym+add)@dtpmod */
0240 #define R_PPC64_TPREL16     69 /* half16*   (sym+add)@tprel */
0241 #define R_PPC64_TPREL16_LO  70 /* half16    (sym+add)@tprel@l */
0242 #define R_PPC64_TPREL16_HI  71 /* half16    (sym+add)@tprel@h */
0243 #define R_PPC64_TPREL16_HA  72 /* half16    (sym+add)@tprel@ha */
0244 #define R_PPC64_TPREL64     73 /* doubleword64 (sym+add)@tprel */
0245 #define R_PPC64_DTPREL16    74 /* half16*   (sym+add)@dtprel */
0246 #define R_PPC64_DTPREL16_LO 75 /* half16    (sym+add)@dtprel@l */
0247 #define R_PPC64_DTPREL16_HI 76 /* half16    (sym+add)@dtprel@h */
0248 #define R_PPC64_DTPREL16_HA 77 /* half16    (sym+add)@dtprel@ha */
0249 #define R_PPC64_DTPREL64    78 /* doubleword64 (sym+add)@dtprel */
0250 #define R_PPC64_GOT_TLSGD16 79 /* half16*   (sym+add)@got@tlsgd */
0251 #define R_PPC64_GOT_TLSGD16_LO  80 /* half16    (sym+add)@got@tlsgd@l */
0252 #define R_PPC64_GOT_TLSGD16_HI  81 /* half16    (sym+add)@got@tlsgd@h */
0253 #define R_PPC64_GOT_TLSGD16_HA  82 /* half16    (sym+add)@got@tlsgd@ha */
0254 #define R_PPC64_GOT_TLSLD16 83 /* half16*   (sym+add)@got@tlsld */
0255 #define R_PPC64_GOT_TLSLD16_LO  84 /* half16    (sym+add)@got@tlsld@l */
0256 #define R_PPC64_GOT_TLSLD16_HI  85 /* half16    (sym+add)@got@tlsld@h */
0257 #define R_PPC64_GOT_TLSLD16_HA  86 /* half16    (sym+add)@got@tlsld@ha */
0258 #define R_PPC64_GOT_TPREL16_DS  87 /* half16ds* (sym+add)@got@tprel */
0259 #define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
0260 #define R_PPC64_GOT_TPREL16_HI  89 /* half16    (sym+add)@got@tprel@h */
0261 #define R_PPC64_GOT_TPREL16_HA  90 /* half16    (sym+add)@got@tprel@ha */
0262 #define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
0263 #define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
0264 #define R_PPC64_GOT_DTPREL16_HI 93 /* half16    (sym+add)@got@dtprel@h */
0265 #define R_PPC64_GOT_DTPREL16_HA 94 /* half16    (sym+add)@got@dtprel@ha */
0266 #define R_PPC64_TPREL16_DS  95 /* half16ds* (sym+add)@tprel */
0267 #define R_PPC64_TPREL16_LO_DS   96 /* half16ds  (sym+add)@tprel@l */
0268 #define R_PPC64_TPREL16_HIGHER  97 /* half16    (sym+add)@tprel@higher */
0269 #define R_PPC64_TPREL16_HIGHERA 98 /* half16    (sym+add)@tprel@highera */
0270 #define R_PPC64_TPREL16_HIGHEST 99 /* half16    (sym+add)@tprel@highest */
0271 #define R_PPC64_TPREL16_HIGHESTA 100 /* half16  (sym+add)@tprel@highesta */
0272 #define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
0273 #define R_PPC64_DTPREL16_LO_DS  102 /* half16ds (sym+add)@dtprel@l */
0274 #define R_PPC64_DTPREL16_HIGHER 103 /* half16   (sym+add)@dtprel@higher */
0275 #define R_PPC64_DTPREL16_HIGHERA 104 /* half16  (sym+add)@dtprel@highera */
0276 #define R_PPC64_DTPREL16_HIGHEST 105 /* half16  (sym+add)@dtprel@highest */
0277 #define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
0278 #define R_PPC64_TLSGD       107
0279 #define R_PPC64_TLSLD       108
0280 #define R_PPC64_TOCSAVE     109
0281
0282 #define R_PPC64_ENTRY       118
0283
0284 #define R_PPC64_REL16       249
0285 #define R_PPC64_REL16_LO    250
0286 #define R_PPC64_REL16_HI    251
0287 #define R_PPC64_REL16_HA    252
0288
0289 /* Keep this the last entry.  */
0290 #define R_PPC64_NUM     253
0291
0292 #endif /* _UAPI_ASM_POWERPC_ELF_H */