include/asm/tsi108_irq.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * (C) Copyright 2005 Tundra Semiconductor Corp.
0004  * Alex Bounine, <alexandreb at tundra.com).
0005  *
0006  * See file CREDITS for list of people who contributed to this
0007  * project.
0008  */
0009
0010 /*
0011  * definitions for interrupt controller initialization and external interrupt
0012  * demultiplexing on TSI108EMU/SVB boards.
0013  */
0014
0015 #ifndef _ASM_POWERPC_TSI108_IRQ_H
0016 #define _ASM_POWERPC_TSI108_IRQ_H
0017
0018 /*
0019  * Tsi108 interrupts
0020  */
0021 #ifndef TSI108_IRQ_REG_BASE
0022 #define TSI108_IRQ_REG_BASE     0
0023 #endif
0024
0025 #define TSI108_IRQ(x)       (TSI108_IRQ_REG_BASE + (x))
0026
0027 #define TSI108_MAX_VECTORS  (36 + 4)    /* 36 sources + PCI INT demux */
0028 #define MAX_TASK_PRIO   0xF
0029
0030 #define TSI108_IRQ_SPURIOUS (TSI108_MAX_VECTORS)
0031
0032 #define DEFAULT_PRIO_LVL    10  /* initial priority level */
0033
0034 /* Interrupt vectors assignment to external and internal
0035  * sources of requests. */
0036
0037 /* EXTERNAL INTERRUPT SOURCES */
0038
0039 #define IRQ_TSI108_EXT_INT0 TSI108_IRQ(0)   /* External Source at INT[0] */
0040 #define IRQ_TSI108_EXT_INT1 TSI108_IRQ(1)   /* External Source at INT[1] */
0041 #define IRQ_TSI108_EXT_INT2 TSI108_IRQ(2)   /* External Source at INT[2] */
0042 #define IRQ_TSI108_EXT_INT3 TSI108_IRQ(3)   /* External Source at INT[3] */
0043
0044 /* INTERNAL INTERRUPT SOURCES */
0045
0046 #define IRQ_TSI108_RESERVED0    TSI108_IRQ(4)   /* Reserved IRQ */
0047 #define IRQ_TSI108_RESERVED1    TSI108_IRQ(5)   /* Reserved IRQ */
0048 #define IRQ_TSI108_RESERVED2    TSI108_IRQ(6)   /* Reserved IRQ */
0049 #define IRQ_TSI108_RESERVED3    TSI108_IRQ(7)   /* Reserved IRQ */
0050 #define IRQ_TSI108_DMA0     TSI108_IRQ(8)   /* DMA0 */
0051 #define IRQ_TSI108_DMA1     TSI108_IRQ(9)   /* DMA1 */
0052 #define IRQ_TSI108_DMA2     TSI108_IRQ(10)  /* DMA2 */
0053 #define IRQ_TSI108_DMA3     TSI108_IRQ(11)  /* DMA3 */
0054 #define IRQ_TSI108_UART0    TSI108_IRQ(12)  /* UART0 */
0055 #define IRQ_TSI108_UART1    TSI108_IRQ(13)  /* UART1 */
0056 #define IRQ_TSI108_I2C      TSI108_IRQ(14)  /* I2C */
0057 #define IRQ_TSI108_GPIO     TSI108_IRQ(15)  /* GPIO */
0058 #define IRQ_TSI108_GIGE0    TSI108_IRQ(16)  /* GIGE0 */
0059 #define IRQ_TSI108_GIGE1    TSI108_IRQ(17)  /* GIGE1 */
0060 #define IRQ_TSI108_RESERVED4    TSI108_IRQ(18)  /* Reserved IRQ */
0061 #define IRQ_TSI108_HLP      TSI108_IRQ(19)  /* HLP */
0062 #define IRQ_TSI108_SDRAM    TSI108_IRQ(20)  /* SDC */
0063 #define IRQ_TSI108_PROC_IF  TSI108_IRQ(21)  /* Processor IF */
0064 #define IRQ_TSI108_RESERVED5    TSI108_IRQ(22)  /* Reserved IRQ */
0065 #define IRQ_TSI108_PCI      TSI108_IRQ(23)  /* PCI/X block */
0066
0067 #define IRQ_TSI108_MBOX0    TSI108_IRQ(24)  /* Mailbox 0 register */
0068 #define IRQ_TSI108_MBOX1    TSI108_IRQ(25)  /* Mailbox 1 register */
0069 #define IRQ_TSI108_MBOX2    TSI108_IRQ(26)  /* Mailbox 2 register */
0070 #define IRQ_TSI108_MBOX3    TSI108_IRQ(27)  /* Mailbox 3 register */
0071
0072 #define IRQ_TSI108_DBELL0   TSI108_IRQ(28)  /* Doorbell 0 */
0073 #define IRQ_TSI108_DBELL1   TSI108_IRQ(29)  /* Doorbell 1 */
0074 #define IRQ_TSI108_DBELL2   TSI108_IRQ(30)  /* Doorbell 2 */
0075 #define IRQ_TSI108_DBELL3   TSI108_IRQ(31)  /* Doorbell 3 */
0076
0077 #define IRQ_TSI108_TIMER0   TSI108_IRQ(32)  /* Global Timer 0 */
0078 #define IRQ_TSI108_TIMER1   TSI108_IRQ(33)  /* Global Timer 1 */
0079 #define IRQ_TSI108_TIMER2   TSI108_IRQ(34)  /* Global Timer 2 */
0080 #define IRQ_TSI108_TIMER3   TSI108_IRQ(35)  /* Global Timer 3 */
0081
0082 /*
0083  * PCI bus INTA# - INTD# lines demultiplexor
0084  */
0085 #define IRQ_PCI_INTAD_BASE  TSI108_IRQ(36)
0086 #define IRQ_PCI_INTA        (IRQ_PCI_INTAD_BASE + 0)
0087 #define IRQ_PCI_INTB        (IRQ_PCI_INTAD_BASE + 1)
0088 #define IRQ_PCI_INTC        (IRQ_PCI_INTAD_BASE + 2)
0089 #define IRQ_PCI_INTD        (IRQ_PCI_INTAD_BASE + 3)
0090 #define NUM_PCI_IRQS        (4)
0091
0092 /* number of entries in vector dispatch table */
0093 #define IRQ_TSI108_TAB_SIZE (TSI108_MAX_VECTORS + 1)
0094
0095 /* Mapping of MPIC outputs to processors' interrupt pins */
0096
0097 #define IDIR_INT_OUT0       0x1
0098 #define IDIR_INT_OUT1       0x2
0099 #define IDIR_INT_OUT2       0x4
0100 #define IDIR_INT_OUT3       0x8
0101
0102 /*---------------------------------------------------------------
0103  * IRQ line configuration parameters */
0104
0105 /* Interrupt delivery modes */
0106 typedef enum {
0107     TSI108_IRQ_DIRECTED,
0108     TSI108_IRQ_DISTRIBUTED,
0109 } TSI108_IRQ_MODE;
0110 #endif              /*  _ASM_POWERPC_TSI108_IRQ_H */