include/asm/sfp-machine.h

0001 /* Machine-dependent software floating-point definitions.  PPC version.
0002    Copyright (C) 1997 Free Software Foundation, Inc.
0003    This file is part of the GNU C Library.
0004
0005    The GNU C Library is free software; you can redistribute it and/or
0006    modify it under the terms of the GNU Library General Public License as
0007    published by the Free Software Foundation; either version 2 of the
0008    License, or (at your option) any later version.
0009
0010    The GNU C Library is distributed in the hope that it will be useful,
0011    but WITHOUT ANY WARRANTY; without even the implied warranty of
0012    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
0013    Library General Public License for more details.
0014
0015    You should have received a copy of the GNU Library General Public
0016    License along with the GNU C Library; see the file COPYING.LIB.  If
0017    not, write to the Free Software Foundation, Inc.,
0018    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
0019
0020    Actually, this is a PPC (32bit) version, written based on the
0021    i386, sparc, and sparc64 versions, by me,
0022    Peter Maydell (pmaydell@chiark.greenend.org.uk).
0023    Comments are by and large also mine, although they may be inaccurate.
0024
0025    In picking out asm fragments I've gone with the lowest common
0026    denominator, which also happens to be the hardware I have :->
0027    That is, a SPARC without hardware multiply and divide.
0028  */
0029
0030 /* basic word size definitions */
0031 #define _FP_W_TYPE_SIZE     32
0032 #define _FP_W_TYPE      unsigned int
0033 #define _FP_WS_TYPE     signed int
0034 #define _FP_I_TYPE      int
0035
0036 #define __ll_B          ((UWtype) 1 << (W_TYPE_SIZE / 2))
0037 #define __ll_lowpart(t)     ((UWtype) (t) & (__ll_B - 1))
0038 #define __ll_highpart(t)    ((UWtype) (t) >> (W_TYPE_SIZE / 2))
0039
0040 /* You can optionally code some things like addition in asm. For
0041  * example, i386 defines __FP_FRAC_ADD_2 as asm. If you don't
0042  * then you get a fragment of C code [if you change an #ifdef 0
0043  * in op-2.h] or a call to add_ssaaaa (see below).
0044  * Good places to look for asm fragments to use are gcc and glibc.
0045  * gcc's longlong.h is useful.
0046  */
0047
0048 /* We need to know how to multiply and divide. If the host word size
0049  * is >= 2*fracbits you can use FP_MUL_MEAT_n_imm(t,R,X,Y) which
0050  * codes the multiply with whatever gcc does to 'a * b'.
0051  * _FP_MUL_MEAT_n_wide(t,R,X,Y,f) is used when you have an asm
0052  * function that can multiply two 1W values and get a 2W result.
0053  * Otherwise you're stuck with _FP_MUL_MEAT_n_hard(t,R,X,Y) which
0054  * does bitshifting to avoid overflow.
0055  * For division there is FP_DIV_MEAT_n_imm(t,R,X,Y,f) for word size
0056  * >= 2*fracbits, where f is either _FP_DIV_HELP_imm or
0057  * _FP_DIV_HELP_ldiv (see op-1.h).
0058  * _FP_DIV_MEAT_udiv() is if you have asm to do 2W/1W => (1W, 1W).
0059  * [GCC and glibc have longlong.h which has the asm macro udiv_qrnnd
0060  * to do this.]
0061  * In general, 'n' is the number of words required to hold the type,
0062  * and 't' is either S, D or Q for single/double/quad.
0063  *           -- PMM
0064  */
0065 /* Example: SPARC64:
0066  * #define _FP_MUL_MEAT_S(R,X,Y)    _FP_MUL_MEAT_1_imm(S,R,X,Y)
0067  * #define _FP_MUL_MEAT_D(R,X,Y)    _FP_MUL_MEAT_1_wide(D,R,X,Y,umul_ppmm)
0068  * #define _FP_MUL_MEAT_Q(R,X,Y)    _FP_MUL_MEAT_2_wide(Q,R,X,Y,umul_ppmm)
0069  *
0070  * #define _FP_DIV_MEAT_S(R,X,Y)    _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
0071  * #define _FP_DIV_MEAT_D(R,X,Y)    _FP_DIV_MEAT_1_udiv(D,R,X,Y)
0072  * #define _FP_DIV_MEAT_Q(R,X,Y)    _FP_DIV_MEAT_2_udiv_64(Q,R,X,Y)
0073  *
0074  * Example: i386:
0075  * #define _FP_MUL_MEAT_S(R,X,Y)   _FP_MUL_MEAT_1_wide(S,R,X,Y,_i386_mul_32_64)
0076  * #define _FP_MUL_MEAT_D(R,X,Y)   _FP_MUL_MEAT_2_wide(D,R,X,Y,_i386_mul_32_64)
0077  *
0078  * #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y,_i386_div_64_32)
0079  * #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
0080  */
0081
0082 #define _FP_MUL_MEAT_S(R,X,Y)   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
0083 #define _FP_MUL_MEAT_D(R,X,Y)   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
0084
0085 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
0086 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
0087
0088 /* These macros define what NaN looks like. They're supposed to expand to
0089  * a comma-separated set of 32bit unsigned ints that encode NaN.
0090  */
0091 #define _FP_NANFRAC_S       ((_FP_QNANBIT_S << 1) - 1)
0092 #define _FP_NANFRAC_D       ((_FP_QNANBIT_D << 1) - 1), -1
0093 #define _FP_NANFRAC_Q       ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
0094 #define _FP_NANSIGN_S       0
0095 #define _FP_NANSIGN_D       0
0096 #define _FP_NANSIGN_Q       0
0097
0098 #define _FP_KEEPNANFRACP 1
0099
0100 #ifdef FP_EX_BOOKE_E500_SPE
0101 #define FP_EX_INEXACT       (1 << 21)
0102 #define FP_EX_INVALID       (1 << 20)
0103 #define FP_EX_DIVZERO       (1 << 19)
0104 #define FP_EX_UNDERFLOW     (1 << 18)
0105 #define FP_EX_OVERFLOW      (1 << 17)
0106 #define FP_INHIBIT_RESULTS  0
0107
0108 #define __FPU_FPSCR (current->thread.spefscr)
0109 #define __FPU_ENABLED_EXC       \
0110 ({                  \
0111     (__FPU_FPSCR >> 2) & 0x1f;  \
0112 })
0113 #else
0114 /* Exception flags.  We use the bit positions of the appropriate bits
0115    in the FPSCR, which also correspond to the FE_* bits.  This makes
0116    everything easier ;-).  */
0117 #define FP_EX_INVALID         (1 << (31 - 2))
0118 #define FP_EX_INVALID_SNAN  EFLAG_VXSNAN
0119 #define FP_EX_INVALID_ISI   EFLAG_VXISI
0120 #define FP_EX_INVALID_IDI   EFLAG_VXIDI
0121 #define FP_EX_INVALID_ZDZ   EFLAG_VXZDZ
0122 #define FP_EX_INVALID_IMZ   EFLAG_VXIMZ
0123 #define FP_EX_OVERFLOW        (1 << (31 - 3))
0124 #define FP_EX_UNDERFLOW       (1 << (31 - 4))
0125 #define FP_EX_DIVZERO         (1 << (31 - 5))
0126 #define FP_EX_INEXACT         (1 << (31 - 6))
0127
0128 #define __FPU_FPSCR (current->thread.fp_state.fpscr)
0129
0130 /* We only actually write to the destination register
0131  * if exceptions signalled (if any) will not trap.
0132  */
0133 #define __FPU_ENABLED_EXC \
0134 ({                      \
0135     (__FPU_FPSCR >> 3) & 0x1f;  \
0136 })
0137
0138 #endif
0139
0140 /*
0141  * If one NaN is signaling and the other is not,
0142  * we choose that one, otherwise we choose X.
0143  */
0144 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)          \
0145   do {                              \
0146     if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)      \
0147     && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \
0148       {                             \
0149     R##_s = X##_s;                      \
0150     _FP_FRAC_COPY_##wc(R,X);                \
0151       }                             \
0152     else                            \
0153       {                             \
0154     R##_s = Y##_s;                      \
0155     _FP_FRAC_COPY_##wc(R,Y);                \
0156       }                             \
0157     R##_c = FP_CLS_NAN;                     \
0158   } while (0)
0159
0160
0161 #include <linux/kernel.h>
0162 #include <linux/sched.h>
0163
0164 #define __FPU_TRAP_P(bits) \
0165     ((__FPU_ENABLED_EXC & (bits)) != 0)
0166
0167 #define __FP_PACK_S(val,X)          \
0168 ({  int __exc = _FP_PACK_CANONICAL(S,1,X);  \
0169     if(!__exc || !__FPU_TRAP_P(__exc))      \
0170         _FP_PACK_RAW_1_P(S,val,X);      \
0171     __exc;                  \
0172 })
0173
0174 #define __FP_PACK_D(val,X)          \
0175    do {                                 \
0176     _FP_PACK_CANONICAL(D, 2, X);                    \
0177     if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) \
0178         _FP_PACK_RAW_2_P(D, val, X);                \
0179    } while (0)
0180
0181 #define __FP_PACK_DS(val,X)                         \
0182    do {                                     \
0183        FP_DECL_S(__X);                          \
0184        FP_CONV(S, D, 1, 2, __X, X);                     \
0185        _FP_PACK_CANONICAL(S, 1, __X);                   \
0186        if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) {    \
0187            _FP_UNPACK_CANONICAL(S, 1, __X);             \
0188            FP_CONV(D, S, 2, 1, X, __X);                 \
0189            _FP_PACK_CANONICAL(D, 2, X);                 \
0190            if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS))  \
0191            _FP_PACK_RAW_2_P(D, val, X);                 \
0192        }                                    \
0193    } while (0)
0194
0195 /* Obtain the current rounding mode. */
0196 #define FP_ROUNDMODE            \
0197 ({                  \
0198     __FPU_FPSCR & 0x3;      \
0199 })
0200
0201 /* the asm fragments go here: all these are taken from glibc-2.0.5's
0202  * stdlib/longlong.h
0203  */
0204
0205 #include <linux/types.h>
0206 #include <asm/byteorder.h>
0207
0208 /* add_ssaaaa is used in op-2.h and should be equivalent to
0209  * #define add_ssaaaa(sh,sl,ah,al,bh,bl) (sh = ah+bh+ (( sl = al+bl) < al))
0210  * add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
0211  * high_addend_2, low_addend_2) adds two UWtype integers, composed by
0212  * HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
0213  * respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
0214  * (i.e. carry out) is not stored anywhere, and is lost.
0215  */
0216 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
0217   do {                                  \
0218     if (__builtin_constant_p (bh) && (bh) == 0)             \
0219       __asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2"        \
0220          : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
0221     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)     \
0222       __asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2"        \
0223          : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
0224     else                                \
0225       __asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3"      \
0226          : "=r" (sh), "=&r" (sl)                    \
0227          : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));      \
0228   } while (0)
0229
0230 /* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
0231  * #define sub_ddmmss(sh, sl, ah, al, bh, bl) (sh = ah-bh - ((sl = al-bl) > al))
0232  * sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
0233  * high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
0234  * composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
0235  * LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
0236  * and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
0237  * and is lost.
0238  */
0239 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
0240   do {                                  \
0241     if (__builtin_constant_p (ah) && (ah) == 0)             \
0242       __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"  \
0243            : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
0244     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)     \
0245       __asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2"  \
0246            : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
0247     else if (__builtin_constant_p (bh) && (bh) == 0)            \
0248       __asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2"       \
0249            : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
0250     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)     \
0251       __asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2"       \
0252            : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
0253     else                                \
0254       __asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2"    \
0255            : "=r" (sh), "=&r" (sl)                  \
0256            : "r" (ah), "r" (bh), "rI" (al), "r" (bl));      \
0257   } while (0)
0258
0259 /* asm fragments for mul and div */
0260
0261 /* umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
0262  * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
0263  * word product in HIGH_PROD and LOW_PROD.
0264  */
0265 #define umul_ppmm(ph, pl, m0, m1) \
0266   do {                                  \
0267     USItype __m0 = (m0), __m1 = (m1);                   \
0268     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));  \
0269     (pl) = __m0 * __m1;                         \
0270   } while (0)
0271
0272 /* udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
0273  * denominator) divides a UDWtype, composed by the UWtype integers
0274  * HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
0275  * in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
0276  * than DENOMINATOR for correct operation.  If, in addition, the most
0277  * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
0278  * UDIV_NEEDS_NORMALIZATION is defined to 1.
0279  */
0280 #define udiv_qrnnd(q, r, n1, n0, d) \
0281   do {                                  \
0282     UWtype __d1, __d0, __q1, __q0;                  \
0283     UWtype __r1, __r0, __m;                     \
0284     __d1 = __ll_highpart (d);                       \
0285     __d0 = __ll_lowpart (d);                        \
0286                                     \
0287     __r1 = (n1) % __d1;                         \
0288     __q1 = (n1) / __d1;                         \
0289     __m = (UWtype) __q1 * __d0;                     \
0290     __r1 = __r1 * __ll_B | __ll_highpart (n0);              \
0291     if (__r1 < __m)                         \
0292       {                                 \
0293     __q1--, __r1 += (d);                        \
0294     if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
0295       if (__r1 < __m)                       \
0296         __q1--, __r1 += (d);                    \
0297       }                                 \
0298     __r1 -= __m;                            \
0299                                     \
0300     __r0 = __r1 % __d1;                         \
0301     __q0 = __r1 / __d1;                         \
0302     __m = (UWtype) __q0 * __d0;                     \
0303     __r0 = __r0 * __ll_B | __ll_lowpart (n0);               \
0304     if (__r0 < __m)                         \
0305       {                                 \
0306     __q0--, __r0 += (d);                        \
0307     if (__r0 >= (d))                        \
0308       if (__r0 < __m)                       \
0309         __q0--, __r0 += (d);                    \
0310       }                                 \
0311     __r0 -= __m;                            \
0312                                     \
0313     (q) = (UWtype) __q1 * __ll_B | __q0;                \
0314     (r) = __r0;                             \
0315   } while (0)
0316
0317 #define UDIV_NEEDS_NORMALIZATION 1
0318
0319 #define abort()                             \
0320     return 0
0321
0322 #ifdef __BIG_ENDIAN
0323 #define __BYTE_ORDER __BIG_ENDIAN
0324 #else
0325 #define __BYTE_ORDER __LITTLE_ENDIAN
0326 #endif
0327
0328 /* Exception flags. */
0329 #define EFLAG_INVALID       (1 << (31 - 2))
0330 #define EFLAG_OVERFLOW      (1 << (31 - 3))
0331 #define EFLAG_UNDERFLOW     (1 << (31 - 4))
0332 #define EFLAG_DIVZERO       (1 << (31 - 5))
0333 #define EFLAG_INEXACT       (1 << (31 - 6))
0334
0335 #define EFLAG_VXSNAN        (1 << (31 - 7))
0336 #define EFLAG_VXISI     (1 << (31 - 8))
0337 #define EFLAG_VXIDI     (1 << (31 - 9))
0338 #define EFLAG_VXZDZ     (1 << (31 - 10))
0339 #define EFLAG_VXIMZ     (1 << (31 - 11))
0340 #define EFLAG_VXVC      (1 << (31 - 12))
0341 #define EFLAG_VXSOFT        (1 << (31 - 21))
0342 #define EFLAG_VXSQRT        (1 << (31 - 22))
0343 #define EFLAG_VXCVI     (1 << (31 - 23))