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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
0004  */
0005 #ifndef _ASM_POWERPC_RUNLATCH_H
0006 #define _ASM_POWERPC_RUNLATCH_H
0007 
0008 #ifdef CONFIG_PPC64
0009 
0010 extern void __ppc64_runlatch_on(void);
0011 extern void __ppc64_runlatch_off(void);
0012 
0013 /*
0014  * We manually hard enable-disable, this is called
0015  * in the idle loop and we don't want to mess up
0016  * with soft-disable/enable & interrupt replay.
0017  */
0018 #define ppc64_runlatch_off()                    \
0019     do {                            \
0020         if (cpu_has_feature(CPU_FTR_CTRL) &&        \
0021             test_thread_local_flags(_TLF_RUNLATCH)) {   \
0022             unsigned long msr = mfmsr();        \
0023             __hard_irq_disable();           \
0024             __ppc64_runlatch_off();         \
0025             if (msr & MSR_EE)           \
0026                 __hard_irq_enable();        \
0027         }                           \
0028     } while (0)
0029 
0030 #define ppc64_runlatch_on()                 \
0031     do {                            \
0032         if (cpu_has_feature(CPU_FTR_CTRL) &&        \
0033             !test_thread_local_flags(_TLF_RUNLATCH)) {  \
0034             unsigned long msr = mfmsr();        \
0035             __hard_irq_disable();           \
0036             __ppc64_runlatch_on();          \
0037             if (msr & MSR_EE)           \
0038                 __hard_irq_enable();        \
0039         }                           \
0040     } while (0)
0041 #else
0042 #define ppc64_runlatch_on()
0043 #define ppc64_runlatch_off()
0044 #endif /* CONFIG_PPC64 */
0045 
0046 #endif /* _ASM_POWERPC_RUNLATCH_H */