include/asm/reg_fsl_emb.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Contains register definitions for the Freescale Embedded Performance
0004  * Monitor.
0005  */
0006 #ifdef __KERNEL__
0007 #ifndef __ASM_POWERPC_REG_FSL_EMB_H__
0008 #define __ASM_POWERPC_REG_FSL_EMB_H__
0009
0010 #include <linux/stringify.h>
0011
0012 #ifndef __ASSEMBLY__
0013 /* Performance Monitor Registers */
0014 #define mfpmr(rn)   ({unsigned int rval; \
0015             asm volatile("mfpmr %0," __stringify(rn) \
0016                      : "=r" (rval)); rval;})
0017 #define mtpmr(rn, v)    asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
0018 #endif /* __ASSEMBLY__ */
0019
0020 /* Freescale Book E Performance Monitor APU Registers */
0021 #define PMRN_PMC0   0x010   /* Performance Monitor Counter 0 */
0022 #define PMRN_PMC1   0x011   /* Performance Monitor Counter 1 */
0023 #define PMRN_PMC2   0x012   /* Performance Monitor Counter 2 */
0024 #define PMRN_PMC3   0x013   /* Performance Monitor Counter 3 */
0025 #define PMRN_PMC4   0x014   /* Performance Monitor Counter 4 */
0026 #define PMRN_PMC5   0x015   /* Performance Monitor Counter 5 */
0027 #define PMRN_PMLCA0 0x090   /* PM Local Control A0 */
0028 #define PMRN_PMLCA1 0x091   /* PM Local Control A1 */
0029 #define PMRN_PMLCA2 0x092   /* PM Local Control A2 */
0030 #define PMRN_PMLCA3 0x093   /* PM Local Control A3 */
0031 #define PMRN_PMLCA4 0x094   /* PM Local Control A4 */
0032 #define PMRN_PMLCA5 0x095   /* PM Local Control A5 */
0033
0034 #define PMLCA_FC    0x80000000  /* Freeze Counter */
0035 #define PMLCA_FCS   0x40000000  /* Freeze in Supervisor */
0036 #define PMLCA_FCU   0x20000000  /* Freeze in User */
0037 #define PMLCA_FCM1  0x10000000  /* Freeze when PMM==1 */
0038 #define PMLCA_FCM0  0x08000000  /* Freeze when PMM==0 */
0039 #define PMLCA_CE    0x04000000  /* Condition Enable */
0040 #define PMLCA_FGCS1 0x00000002  /* Freeze in guest state */
0041 #define PMLCA_FGCS0 0x00000001  /* Freeze in hypervisor state */
0042
0043 #define PMLCA_EVENT_MASK 0x01ff0000 /* Event field */
0044 #define PMLCA_EVENT_SHIFT   16
0045
0046 #define PMRN_PMLCB0 0x110   /* PM Local Control B0 */
0047 #define PMRN_PMLCB1 0x111   /* PM Local Control B1 */
0048 #define PMRN_PMLCB2 0x112   /* PM Local Control B2 */
0049 #define PMRN_PMLCB3 0x113   /* PM Local Control B3 */
0050 #define PMRN_PMLCB4 0x114   /* PM Local Control B4 */
0051 #define PMRN_PMLCB5 0x115   /* PM Local Control B5 */
0052
0053 #define PMLCB_THRESHMUL_MASK    0x0700  /* Threshold Multiple Field */
0054 #define PMLCB_THRESHMUL_SHIFT   8
0055
0056 #define PMLCB_THRESHOLD_MASK    0x003f  /* Threshold Field */
0057 #define PMLCB_THRESHOLD_SHIFT   0
0058
0059 #define PMRN_PMGC0  0x190   /* PM Global Control 0 */
0060
0061 #define PMGC0_FAC   0x80000000  /* Freeze all Counters */
0062 #define PMGC0_PMIE  0x40000000  /* Interrupt Enable */
0063 #define PMGC0_FCECE 0x20000000  /* Freeze countes on
0064                        Enabled Condition or
0065                        Event */
0066
0067 #define PMRN_UPMC0  0x000   /* User Performance Monitor Counter 0 */
0068 #define PMRN_UPMC1  0x001   /* User Performance Monitor Counter 1 */
0069 #define PMRN_UPMC2  0x002   /* User Performance Monitor Counter 2 */
0070 #define PMRN_UPMC3  0x003   /* User Performance Monitor Counter 3 */
0071 #define PMRN_UPMC4  0x004   /* User Performance Monitor Counter 4 */
0072 #define PMRN_UPMC5  0x005   /* User Performance Monitor Counter 5 */
0073 #define PMRN_UPMLCA0    0x080   /* User PM Local Control A0 */
0074 #define PMRN_UPMLCA1    0x081   /* User PM Local Control A1 */
0075 #define PMRN_UPMLCA2    0x082   /* User PM Local Control A2 */
0076 #define PMRN_UPMLCA3    0x083   /* User PM Local Control A3 */
0077 #define PMRN_UPMLCA4    0x084   /* User PM Local Control A4 */
0078 #define PMRN_UPMLCA5    0x085   /* User PM Local Control A5 */
0079 #define PMRN_UPMLCB0    0x100   /* User PM Local Control B0 */
0080 #define PMRN_UPMLCB1    0x101   /* User PM Local Control B1 */
0081 #define PMRN_UPMLCB2    0x102   /* User PM Local Control B2 */
0082 #define PMRN_UPMLCB3    0x103   /* User PM Local Control B3 */
0083 #define PMRN_UPMLCB4    0x104   /* User PM Local Control B4 */
0084 #define PMRN_UPMLCB5    0x105   /* User PM Local Control B5 */
0085 #define PMRN_UPMGC0 0x180   /* User PM Global Control 0 */
0086
0087
0088 #endif /* __ASM_POWERPC_REG_FSL_EMB_H__ */
0089 #endif /* __KERNEL__ */