include/asm/pci.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 #ifndef __ASM_POWERPC_PCI_H
0003 #define __ASM_POWERPC_PCI_H
0004 #ifdef __KERNEL__
0005
0006 /*
0007  */
0008
0009 #include <linux/types.h>
0010 #include <linux/slab.h>
0011 #include <linux/string.h>
0012 #include <linux/dma-map-ops.h>
0013 #include <linux/scatterlist.h>
0014
0015 #include <asm/machdep.h>
0016 #include <asm/io.h>
0017 #include <asm/pci-bridge.h>
0018
0019 /* Return values for pci_controller_ops.probe_mode function */
0020 #define PCI_PROBE_NONE      -1  /* Don't look at this bus at all */
0021 #define PCI_PROBE_NORMAL    0   /* Do normal PCI probing */
0022 #define PCI_PROBE_DEVTREE   1   /* Instantiate from device tree */
0023
0024 #define PCIBIOS_MIN_IO      0x1000
0025 #define PCIBIOS_MIN_MEM     0x10000000
0026
0027 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
0028 #define IOBASE_BRIDGE_NUMBER    0
0029 #define IOBASE_MEMORY       1
0030 #define IOBASE_IO       2
0031 #define IOBASE_ISA_IO       3
0032 #define IOBASE_ISA_MEM      4
0033
0034 /*
0035  * Set this to 1 if you want the kernel to re-assign all PCI
0036  * bus numbers (don't do that on ppc64 yet !)
0037  */
0038 #define pcibios_assign_all_busses() \
0039     (pci_has_flag(PCI_REASSIGN_ALL_BUS))
0040
0041 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
0042 {
0043     if (ppc_md.pci_get_legacy_ide_irq)
0044         return ppc_md.pci_get_legacy_ide_irq(dev, channel);
0045     return channel ? 15 : 14;
0046 }
0047
0048 #ifdef CONFIG_PCI
0049 void __init set_pci_dma_ops(const struct dma_map_ops *dma_ops);
0050 #else   /* CONFIG_PCI */
0051 #define set_pci_dma_ops(d)
0052 #endif
0053
0054 #ifdef CONFIG_PPC64
0055
0056 /*
0057  * We want to avoid touching the cacheline size or MWI bit.
0058  * pSeries firmware sets the cacheline size (which is not the cpu cacheline
0059  * size in all cases) and hardware treats MWI the same as memory write.
0060  */
0061 #define PCI_DISABLE_MWI
0062
0063 #endif /* CONFIG_PPC64 */
0064
0065 extern int pci_domain_nr(struct pci_bus *bus);
0066
0067 /* Decide whether to display the domain number in /proc */
0068 extern int pci_proc_domain(struct pci_bus *bus);
0069
0070 struct vm_area_struct;
0071
0072 /* Tell PCI code what kind of PCI resource mappings we support */
0073 #define HAVE_PCI_MMAP           1
0074 #define ARCH_GENERIC_PCI_MMAP_RESOURCE  1
0075 #define arch_can_pci_mmap_io()      1
0076 #define arch_can_pci_mmap_wc()      1
0077
0078 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
0079                size_t count);
0080 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
0081                size_t count);
0082 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
0083                       struct vm_area_struct *vma,
0084                       enum pci_mmap_state mmap_state);
0085
0086 #define HAVE_PCI_LEGACY 1
0087
0088 extern void pcibios_claim_one_bus(struct pci_bus *b);
0089
0090 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
0091
0092 extern void pcibios_resource_survey(void);
0093
0094 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
0095 extern int remove_phb_dynamic(struct pci_controller *phb);
0096
0097 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
0098                     struct pci_bus *bus, int devfn);
0099
0100 extern unsigned int pci_parse_of_flags(u32 addr0, int bridge);
0101
0102 extern void of_scan_pci_bridge(struct pci_dev *dev);
0103
0104 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
0105 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
0106
0107 struct file;
0108 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
0109                      unsigned long pfn,
0110                      unsigned long size,
0111                      pgprot_t prot);
0112
0113 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
0114 extern void pcibios_setup_bus_self(struct pci_bus *bus);
0115 extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
0116 extern void pcibios_scan_phb(struct pci_controller *hose);
0117
0118 #endif  /* __KERNEL__ */
0119
0120 #endif /* __ASM_POWERPC_PCI_H */