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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 #ifndef _ASM_POWERPC_OHARE_H 0003 #define _ASM_POWERPC_OHARE_H 0004 #ifdef __KERNEL__ 0005 /* 0006 * ohare.h: definitions for using the "O'Hare" I/O controller chip. 0007 * 0008 * Copyright (C) 1997 Paul Mackerras. 0009 * 0010 * BenH: Changed to match those of heathrow (but not all of them). Please 0011 * check if I didn't break anything (especially the media bay). 0012 */ 0013 0014 /* offset from ohare base for feature control register */ 0015 #define OHARE_MBCR 0x34 0016 #define OHARE_FCR 0x38 0017 0018 /* 0019 * Bits in feature control register. 0020 * These were mostly derived by experiment on a powerbook 3400 0021 * and may differ for other machines. 0022 */ 0023 #define OH_SCC_RESET 1 0024 #define OH_BAY_POWER_N 2 /* a guess */ 0025 #define OH_BAY_PCI_ENABLE 4 /* a guess */ 0026 #define OH_BAY_IDE_ENABLE 8 0027 #define OH_BAY_FLOPPY_ENABLE 0x10 0028 #define OH_IDE0_ENABLE 0x20 0029 #define OH_IDE0_RESET_N 0x40 /* a guess */ 0030 #define OH_BAY_DEV_MASK 0x1c 0031 #define OH_BAY_RESET_N 0x80 0032 #define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */ 0033 #define OH_SCC_ENABLE 0x200 0034 #define OH_MESH_ENABLE 0x400 0035 #define OH_FLOPPY_ENABLE 0x800 0036 #define OH_SCCA_IO 0x4000 0037 #define OH_SCCB_IO 0x8000 0038 #define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */ 0039 #define OH_IDE1_RESET_N 0x800000 0040 0041 /* 0042 * Bits to set in the feature control register on PowerBooks. 0043 */ 0044 #define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \ 0045 OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO) 0046 0047 /* 0048 * A magic value to put into the feature control register of the 0049 * "ohare" I/O controller on Starmaxes to enable the IDE CD interface. 0050 * Contributed by Harry Eaton. 0051 */ 0052 #define STARMAX_FEATURES 0xbeff7a 0053 0054 #endif /* __KERNEL__ */ 0055 #endif /* _ASM_POWERPC_OHARE_H */
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