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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright 2010-2011 Freescale Semiconductor, Inc.
0004  */
0005 
0006 #ifndef ASM_KVM_BOOKE_HV_ASM_H
0007 #define ASM_KVM_BOOKE_HV_ASM_H
0008 
0009 #include <asm/feature-fixups.h>
0010 
0011 #ifdef __ASSEMBLY__
0012 
0013 /*
0014  * All exceptions from guest state must go through KVM
0015  * (except for those which are delivered directly to the guest) --
0016  * there are no exceptions for which we fall through directly to
0017  * the normal host handler.
0018  *
0019  * 32-bit host
0020  * Expected inputs (normal exceptions):
0021  *   SCRATCH0 = saved r10
0022  *   r10 = thread struct
0023  *   r11 = appropriate SRR1 variant (currently used as scratch)
0024  *   r13 = saved CR
0025  *   *(r10 + THREAD_NORMSAVE(0)) = saved r11
0026  *   *(r10 + THREAD_NORMSAVE(2)) = saved r13
0027  *
0028  * Expected inputs (crit/mcheck/debug exceptions):
0029  *   appropriate SCRATCH = saved r8
0030  *   r8 = exception level stack frame
0031  *   r9 = *(r8 + _CCR) = saved CR
0032  *   r11 = appropriate SRR1 variant (currently used as scratch)
0033  *   *(r8 + GPR9) = saved r9
0034  *   *(r8 + GPR10) = saved r10 (r10 not yet clobbered)
0035  *   *(r8 + GPR11) = saved r11
0036  *
0037  * 64-bit host
0038  * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types):
0039  *  r10 = saved CR
0040  *  r13 = PACA_POINTER
0041  *  *(r13 + PACA_EX##type + EX_R10) = saved r10
0042  *  *(r13 + PACA_EX##type + EX_R11) = saved r11
0043  *  SPRN_SPRG_##type##_SCRATCH = saved r13
0044  *
0045  * Expected inputs (TLB exception type):
0046  *  r10 = saved CR
0047  *  r12 = extlb pointer
0048  *  r13 = PACA_POINTER
0049  *  *(r12 + EX_TLB_R10) = saved r10
0050  *  *(r12 + EX_TLB_R11) = saved r11
0051  *  *(r12 + EX_TLB_R13) = saved r13
0052  *  SPRN_SPRG_GEN_SCRATCH = saved r12
0053  *
0054  * Only the bolted version of TLB miss exception handlers is supported now.
0055  */
0056 .macro DO_KVM intno srr1
0057 #ifdef CONFIG_KVM_BOOKE_HV
0058 BEGIN_FTR_SECTION
0059     mtocrf  0x80, r11   /* check MSR[GS] without clobbering reg */
0060     bf  3, 1975f
0061     b   kvmppc_handler_\intno\()_\srr1
0062 1975:
0063 END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
0064 #endif
0065 .endm
0066 
0067 #endif /*__ASSEMBLY__ */
0068 #endif /* ASM_KVM_BOOKE_HV_ASM_H */