asm/book3s/pgtable.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_POWERPC_BOOK3S_PGTABLE_H
0003 #define _ASM_POWERPC_BOOK3S_PGTABLE_H
0004
0005 #ifdef CONFIG_PPC64
0006 #include <asm/book3s/64/pgtable.h>
0007 #else
0008 #include <asm/book3s/32/pgtable.h>
0009 #endif
0010
0011 #ifndef __ASSEMBLY__
0012 /* Insert a PTE, top-level function is out of line. It uses an inline
0013  * low level function in the respective pgtable-* files
0014  */
0015 extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
0016                pte_t pte);
0017
0018
0019 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
0020 extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
0021                  pte_t *ptep, pte_t entry, int dirty);
0022
0023 struct file;
0024 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
0025                      unsigned long size, pgprot_t vma_prot);
0026 #define __HAVE_PHYS_MEM_ACCESS_PROT
0027
0028 #if defined(CONFIG_PPC32) || defined(CONFIG_PPC_64S_HASH_MMU)
0029 /*
0030  * This gets called at the end of handling a page fault, when
0031  * the kernel has put a new PTE into the page table for the process.
0032  * We use it to ensure coherency between the i-cache and d-cache
0033  * for the page which has just been mapped in.
0034  * On machines which use an MMU hash table, we use this to put a
0035  * corresponding HPTE into the hash table ahead of time, instead of
0036  * waiting for the inevitable extra hash-table miss exception.
0037  */
0038 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
0039 #else
0040 static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) {}
0041 #endif
0042
0043 #endif /* __ASSEMBLY__ */
0044 #endif