book3s/64/hash-4k.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
0003 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
0004
0005 #define H_PTE_INDEX_SIZE  9  // size: 8B << 9 = 4KB, maps: 2^9 x   4KB =   2MB
0006 #define H_PMD_INDEX_SIZE  7  // size: 8B << 7 = 1KB, maps: 2^7 x   2MB = 256MB
0007 #define H_PUD_INDEX_SIZE  9  // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB
0008 #define H_PGD_INDEX_SIZE  9  // size: 8B << 9 = 4KB, maps: 2^9 x 128GB =  64TB
0009
0010 /*
0011  * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
0012  * Hence also limit max EA bits to 64TB.
0013  */
0014 #define MAX_EA_BITS_PER_CONTEXT     46
0015
0016
0017 /*
0018  * Our page table limit us to 64TB. For 64TB physical memory, we only need 64GB
0019  * of vmemmap space. To better support sparse memory layout, we use 61TB
0020  * linear map range, 1TB of vmalloc, 1TB of I/O and 1TB of vmememmap.
0021  */
0022 #define REGION_SHIFT        (40)
0023 #define H_KERN_MAP_SIZE     (ASM_CONST(1) << REGION_SHIFT)
0024
0025 /*
0026  * Limits the linear mapping range
0027  */
0028 #define H_MAX_PHYSMEM_BITS  46
0029
0030 /*
0031  * Define the address range of the kernel non-linear virtual area (61TB)
0032  */
0033 #define H_KERN_VIRT_START   ASM_CONST(0xc0003d0000000000)
0034
0035 #ifndef __ASSEMBLY__
0036 #define H_PTE_TABLE_SIZE    (sizeof(pte_t) << H_PTE_INDEX_SIZE)
0037 #define H_PMD_TABLE_SIZE    (sizeof(pmd_t) << H_PMD_INDEX_SIZE)
0038 #define H_PUD_TABLE_SIZE    (sizeof(pud_t) << H_PUD_INDEX_SIZE)
0039 #define H_PGD_TABLE_SIZE    (sizeof(pgd_t) << H_PGD_INDEX_SIZE)
0040
0041 #define H_PAGE_F_GIX_SHIFT  _PAGE_PA_MAX
0042 #define H_PAGE_F_SECOND     _RPAGE_PKEY_BIT0 /* HPTE is in 2ndary HPTEG */
0043 #define H_PAGE_F_GIX        (_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41)
0044 #define H_PAGE_BUSY     _RPAGE_RSV1
0045 #define H_PAGE_HASHPTE      _RPAGE_PKEY_BIT4
0046
0047 /* PTE flags to conserve for HPTE identification */
0048 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
0049              H_PAGE_F_SECOND | H_PAGE_F_GIX)
0050 /*
0051  * Not supported by 4k linux page size
0052  */
0053 #define H_PAGE_4K_PFN   0x0
0054 #define H_PAGE_THP_HUGE 0x0
0055 #define H_PAGE_COMBO    0x0
0056
0057 /* 8 bytes per each pte entry */
0058 #define H_PTE_FRAG_SIZE_SHIFT  (H_PTE_INDEX_SIZE + 3)
0059 #define H_PTE_FRAG_NR   (PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT)
0060 #define H_PMD_FRAG_SIZE_SHIFT  (H_PMD_INDEX_SIZE + 3)
0061 #define H_PMD_FRAG_NR   (PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT)
0062
0063 /* memory key bits, only 8 keys supported */
0064 #define H_PTE_PKEY_BIT4 0
0065 #define H_PTE_PKEY_BIT3 0
0066 #define H_PTE_PKEY_BIT2 _RPAGE_PKEY_BIT3
0067 #define H_PTE_PKEY_BIT1 _RPAGE_PKEY_BIT2
0068 #define H_PTE_PKEY_BIT0 _RPAGE_PKEY_BIT1
0069
0070
0071 /*
0072  * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
0073  */
0074 #define remap_4k_pfn(vma, addr, pfn, prot)  \
0075     remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
0076
0077 #ifdef CONFIG_HUGETLB_PAGE
0078 static inline int hash__hugepd_ok(hugepd_t hpd)
0079 {
0080     unsigned long hpdval = hpd_val(hpd);
0081     /*
0082      * if it is not a pte and have hugepd shift mask
0083      * set, then it is a hugepd directory pointer
0084      */
0085     if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) &&
0086         ((hpdval & HUGEPD_SHIFT_MASK) != 0))
0087         return true;
0088     return false;
0089 }
0090 #endif
0091
0092 /*
0093  * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
0094  * a matter of returning the PTE bits that need to be modified. On 64K PTE,
0095  * things are a little more involved and hence needs many more parameters to
0096  * accomplish the same. However we want to abstract this out from the caller by
0097  * keeping the prototype consistent across the two formats.
0098  */
0099 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,
0100                      unsigned int subpg_index, unsigned long hidx,
0101                      int offset)
0102 {
0103     return (hidx << H_PAGE_F_GIX_SHIFT) &
0104         (H_PAGE_F_SECOND | H_PAGE_F_GIX);
0105 }
0106
0107 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
0108
0109 static inline char *get_hpte_slot_array(pmd_t *pmdp)
0110 {
0111     BUG();
0112     return NULL;
0113 }
0114
0115 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
0116 {
0117     BUG();
0118     return 0;
0119 }
0120
0121 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
0122                        int index)
0123 {
0124     BUG();
0125     return 0;
0126 }
0127
0128 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
0129                     unsigned int index, unsigned int hidx)
0130 {
0131     BUG();
0132 }
0133
0134 static inline int hash__pmd_trans_huge(pmd_t pmd)
0135 {
0136     return 0;
0137 }
0138
0139 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
0140 {
0141     BUG();
0142     return 0;
0143 }
0144
0145 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
0146 {
0147     BUG();
0148     return pmd;
0149 }
0150
0151 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm,
0152                        unsigned long addr, pmd_t *pmdp,
0153                        unsigned long clr, unsigned long set);
0154 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma,
0155                    unsigned long address, pmd_t *pmdp);
0156 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
0157                      pgtable_t pgtable);
0158 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
0159 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
0160                        unsigned long addr, pmd_t *pmdp);
0161 extern int hash__has_transparent_hugepage(void);
0162 #endif
0163
0164 static inline pmd_t hash__pmd_mkdevmap(pmd_t pmd)
0165 {
0166     BUG();
0167     return pmd;
0168 }
0169
0170 #endif /* !__ASSEMBLY__ */
0171
0172 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */