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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H
0003 #define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H
0004 
0005 #define MMU_NO_CONTEXT      (0)
0006 /*
0007  * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
0008  */
0009 void hash__flush_tlb_mm(struct mm_struct *mm);
0010 void hash__flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
0011 void hash__flush_range(struct mm_struct *mm, unsigned long start, unsigned long end);
0012 
0013 #ifdef CONFIG_SMP
0014 void _tlbie(unsigned long address);
0015 #else
0016 static inline void _tlbie(unsigned long address)
0017 {
0018     asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
0019 }
0020 #endif
0021 void _tlbia(void);
0022 
0023 /*
0024  * Called at the end of a mmu_gather operation to make sure the
0025  * TLB flush is completely done.
0026  */
0027 static inline void tlb_flush(struct mmu_gather *tlb)
0028 {
0029     /* 603 needs to flush the whole TLB here since it doesn't use a hash table. */
0030     if (!mmu_has_feature(MMU_FTR_HPTE_TABLE))
0031         _tlbia();
0032 }
0033 
0034 static inline void flush_range(struct mm_struct *mm, unsigned long start, unsigned long end)
0035 {
0036     start &= PAGE_MASK;
0037     if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
0038         hash__flush_range(mm, start, end);
0039     else if (end - start <= PAGE_SIZE)
0040         _tlbie(start);
0041     else
0042         _tlbia();
0043 }
0044 
0045 static inline void flush_tlb_mm(struct mm_struct *mm)
0046 {
0047     if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
0048         hash__flush_tlb_mm(mm);
0049     else
0050         _tlbia();
0051 }
0052 
0053 static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
0054 {
0055     if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
0056         hash__flush_tlb_page(vma, vmaddr);
0057     else
0058         _tlbie(vmaddr);
0059 }
0060 
0061 static inline void
0062 flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
0063 {
0064     flush_range(vma->vm_mm, start, end);
0065 }
0066 
0067 static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
0068 {
0069     flush_range(&init_mm, start, end);
0070 }
0071 
0072 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
0073                     unsigned long vmaddr)
0074 {
0075     flush_tlb_page(vma, vmaddr);
0076 }
0077 static inline void local_flush_tlb_mm(struct mm_struct *mm)
0078 {
0079     flush_tlb_mm(mm);
0080 }
0081 
0082 #endif /* _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H */