powerpc/boot/wii-head.S

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * arch/powerpc/boot/wii-head.S
0004  *
0005  * Nintendo Wii bootwrapper entry.
0006  * Copyright (C) 2008-2009 The GameCube Linux Team
0007  * Copyright (C) 2008,2009 Albert Herranz
0008  */
0009
0010 #include "ppc_asm.h"
0011
0012 /*
0013  * The entry code does no assumptions regarding:
0014  * - if the data and instruction caches are enabled or not
0015  * - if the MMU is enabled or not
0016  * - if the high BATs are enabled or not
0017  *
0018  * We enable the high BATs, enable the caches if not already enabled,
0019  * enable the MMU with an identity mapping scheme and jump to the start code.
0020  */
0021
0022     .text
0023
0024     .globl _zimage_start
0025 _zimage_start:
0026
0027     /* turn the MMU off */
0028     mfmsr   9
0029     rlwinm  9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
0030     bcl 20, 31, 1f
0031 1:
0032     mflr    8
0033     clrlwi  8, 8, 3     /* convert to a real address */
0034     addi    8, 8, _mmu_off - 1b
0035     mtsrr0  8
0036     mtsrr1  9
0037     rfi
0038 _mmu_off:
0039     /* MMU disabled */
0040
0041     /* setup BATs */
0042     isync
0043     li      8, 0
0044     mtspr   0x210, 8    /* IBAT0U */
0045     mtspr   0x212, 8    /* IBAT1U */
0046     mtspr   0x214, 8    /* IBAT2U */
0047     mtspr   0x216, 8    /* IBAT3U */
0048     mtspr   0x218, 8    /* DBAT0U */
0049     mtspr   0x21a, 8    /* DBAT1U */
0050     mtspr   0x21c, 8    /* DBAT2U */
0051     mtspr   0x21e, 8    /* DBAT3U */
0052
0053     mtspr   0x230, 8    /* IBAT4U */
0054     mtspr   0x232, 8    /* IBAT5U */
0055     mtspr   0x234, 8    /* IBAT6U */
0056     mtspr   0x236, 8    /* IBAT7U */
0057     mtspr   0x238, 8    /* DBAT4U */
0058     mtspr   0x23a, 8    /* DBAT5U */
0059     mtspr   0x23c, 8    /* DBAT6U */
0060     mtspr   0x23e, 8    /* DBAT7U */
0061
0062     li  8, 0x01ff   /* first 16MiB */
0063     li  9, 0x0002   /* rw */
0064     mtspr   0x211, 9    /* IBAT0L */
0065     mtspr   0x210, 8    /* IBAT0U */
0066     mtspr   0x219, 9    /* DBAT0L */
0067     mtspr   0x218, 8    /* DBAT0U */
0068
0069     lis 8, 0x0c00   /* I/O mem */
0070     ori 8, 8, 0x3ff /* 32MiB */
0071     lis 9, 0x0c00
0072     ori 9, 9, 0x002a    /* uncached, guarded, rw */
0073     mtspr   0x21b, 9    /* DBAT1L */
0074     mtspr   0x21a, 8    /* DBAT1U */
0075
0076     lis 8, 0x0100   /* next 8MiB */
0077     ori 8, 8, 0x00ff    /* 8MiB */
0078     lis 9, 0x0100
0079     ori 9, 9, 0x0002    /* rw */
0080     mtspr   0x215, 9    /* IBAT2L */
0081     mtspr   0x214, 8    /* IBAT2U */
0082     mtspr   0x21d, 9    /* DBAT2L */
0083     mtspr   0x21c, 8    /* DBAT2U */
0084
0085     lis 8, 0x1000   /* MEM2 */
0086     ori 8, 8, 0x07ff    /* 64MiB */
0087     lis 9, 0x1000
0088     ori 9, 9, 0x0002    /* rw */
0089     mtspr   0x216, 8    /* IBAT3U */
0090     mtspr   0x217, 9    /* IBAT3L */
0091     mtspr   0x21e, 8    /* DBAT3U */
0092     mtspr   0x21f, 9    /* DBAT3L */
0093
0094     /* enable the high BATs */
0095     mfspr   8, 0x3f3    /* HID4 */
0096     oris    8, 8, 0x0200
0097     mtspr   0x3f3, 8    /* HID4 */
0098
0099     /* enable and invalidate the caches if not already enabled */
0100     mfspr   8, 0x3f0    /* HID0 */
0101     andi.   0, 8, (1<<15)       /* HID0_ICE */
0102     bne 1f
0103     ori 8, 8, (1<<15)|(1<<11)   /* HID0_ICE|HID0_ICFI*/
0104 1:
0105     andi.   0, 8, (1<<14)       /* HID0_DCE */
0106     bne 1f
0107     ori 8, 8, (1<<14)|(1<<10)   /* HID0_DCE|HID0_DCFI*/
0108 1:
0109     mtspr   0x3f0, 8    /* HID0 */
0110     isync
0111
0112     /* initialize arguments */
0113     li  3, 0
0114     li  4, 0
0115     li  5, 0
0116
0117     /* turn the MMU on */
0118     bcl 20, 31, 1f
0119 1:
0120     mflr    8
0121     addi    8, 8, _mmu_on - 1b
0122     mfmsr   9
0123     ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
0124     mtsrr0  8
0125     mtsrr1  9
0126     sync
0127     rfi
0128 _mmu_on:
0129     /* turn on the front blue led (aka: yay! we got here!) */
0130     lis 8, 0x0d00
0131     ori 8, 8, 0x00c0
0132     lwz 9, 0(8)
0133     ori 9, 9, 0x20
0134     stw 9, 0(8)
0135
0136     b _zimage_start_lib
0137