powerpc/boot/util.S

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copied from <file:arch/powerpc/kernel/misc_32.S>
0004  *
0005  * This file contains miscellaneous low-level functions.
0006  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
0007  *
0008  * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
0009  * and Paul Mackerras.
0010  *
0011  * kexec bits:
0012  * Copyright (C) 2002-2003 Eric Biederman  <ebiederm@xmission.com>
0013  * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
0014  */
0015 #include "ppc_asm.h"
0016
0017 #define SPRN_PVR        0x11F   /* Processor Version Register */
0018
0019     .text
0020
0021 /* udelay needs to know the period of the
0022  * timebase in nanoseconds.  This used to be hardcoded to be 60ns
0023  * (period of 66MHz/4).  Now a variable is used that is initialized to
0024  * 60 for backward compatibility, but it can be overridden as necessary
0025  * with code something like this:
0026  *    extern unsigned long timebase_period_ns;
0027  *    timebase_period_ns = 1000000000 / bd->bi_tbfreq;
0028  */
0029     .data
0030     .globl timebase_period_ns
0031 timebase_period_ns:
0032     .long   60
0033
0034     .text
0035 /*
0036  * Delay for a number of microseconds
0037  */
0038     .globl  udelay
0039 udelay:
0040     mulli   r4,r3,1000  /* nanoseconds */
0041     /*  Change r4 to be the number of ticks using:
0042      *  (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
0043      *  timebase_period_ns defaults to 60 (16.6MHz) */
0044     mflr    r5
0045     bcl 20,31,0f
0046 0:  mflr    r6
0047     mtlr    r5
0048     addis   r5,r6,(timebase_period_ns-0b)@ha
0049     lwz r5,(timebase_period_ns-0b)@l(r5)
0050     add r4,r4,r5
0051     addi    r4,r4,-1
0052     divw    r4,r4,r5    /* BUS ticks */
0053 1:  MFTBU(r5)
0054     MFTBL(r6)
0055     MFTBU(r7)
0056     cmpw    0,r5,r7
0057     bne 1b      /* Get [synced] base time */
0058     addc    r9,r6,r4    /* Compute end time */
0059     addze   r8,r5
0060 2:  MFTBU(r5)
0061     cmpw    0,r5,r8
0062     blt 2b
0063     bgt 3f
0064     MFTBL(r6)
0065     cmpw    0,r6,r9
0066     blt 2b
0067 3:  blr