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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * PowerQUICC II support functions
0004  *
0005  * Author: Scott Wood <scottwood@freescale.com>
0006  *
0007  * Copyright (c) 2007 Freescale Semiconductor, Inc.
0008  */
0009 
0010 #include "ops.h"
0011 #include "types.h"
0012 #include "fsl-soc.h"
0013 #include "pq2.h"
0014 #include "stdio.h"
0015 #include "io.h"
0016 
0017 #define PQ2_SCCR (0x10c80/4) /* System Clock Configuration Register */
0018 #define PQ2_SCMR (0x10c88/4) /* System Clock Mode Register */
0019 
0020 static int pq2_corecnf_map[] = {
0021     3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1,
0022     6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1
0023 };
0024 
0025 /* Get various clocks from crystal frequency.
0026  * Returns zero on failure and non-zero on success.
0027  */
0028 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
0029                    u32 *timebase, u32 *brgfreq)
0030 {
0031     u32 *immr;
0032     u32 sccr, scmr, mainclk, busclk;
0033     int corecnf, busdf, plldf, pllmf, dfbrg;
0034 
0035     immr = fsl_get_immr();
0036     if (!immr) {
0037         printf("pq2_get_clocks: Couldn't get IMMR base.\r\n");
0038         return 0;
0039     }
0040 
0041     sccr = in_be32(&immr[PQ2_SCCR]);
0042     scmr = in_be32(&immr[PQ2_SCMR]);
0043 
0044     dfbrg = sccr & 3;
0045     corecnf = (scmr >> 24) & 0x1f;
0046     busdf = (scmr >> 20) & 0xf;
0047     plldf = (scmr >> 12) & 1;
0048     pllmf = scmr & 0xfff;
0049 
0050     mainclk = crystal * (pllmf + 1) / (plldf + 1);
0051     busclk = mainclk / (busdf + 1);
0052 
0053     if (sysfreq)
0054         *sysfreq = mainclk / 2;
0055     if (timebase)
0056         *timebase = busclk / 4;
0057     if (brgfreq)
0058         *brgfreq = mainclk / (1 << ((dfbrg + 1) * 2));
0059 
0060     if (corefreq) {
0061         int coremult = pq2_corecnf_map[corecnf];
0062 
0063         if (coremult < 0)
0064             *corefreq = mainclk / 2;
0065         else if (coremult == 0)
0066             return 0;
0067         else
0068             *corefreq = busclk * coremult / 2;
0069     }
0070 
0071     return 1;
0072 }
0073 
0074 /* Set common device tree fields based on the given clock frequencies. */
0075 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq)
0076 {
0077     void *node;
0078 
0079     dt_fixup_cpu_clocks(corefreq, timebase, sysfreq);
0080 
0081     node = finddevice("/soc/cpm");
0082     if (node)
0083         setprop(node, "clock-frequency", &sysfreq, 4);
0084 
0085     node = finddevice("/soc/cpm/brg");
0086     if (node)
0087         setprop(node, "clock-frequency", &brgfreq, 4);
0088 }
0089 
0090 int pq2_fixup_clocks(u32 crystal)
0091 {
0092     u32 sysfreq, corefreq, timebase, brgfreq;
0093 
0094     if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq))
0095         return 0;
0096 
0097     pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq);
0098     return 1;
0099 }