powerpc/boot/ppcboot-hotfoot.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * This interface is used for compatibility with old U-boots *ONLY*.
0004  * Please do not imitate or extend this.
0005  */
0006
0007 /*
0008  * Unfortunately, the ESTeem Hotfoot board uses a mangled version of
0009  * ppcboot.h for historical reasons, and in the interest of having a
0010  * mainline kernel boot on the production board+bootloader, this was the
0011  * least-offensive solution.  Please direct all flames to:
0012  *
0013  *  Solomon Peachy <solomon@linux-wlan.com>
0014  *
0015  * (This header is identical to ppcboot.h except for the
0016  *  TARGET_HOTFOOT bits)
0017  */
0018
0019 /*
0020  * (C) Copyright 2000, 2001
0021  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
0022  */
0023
0024 #ifndef __PPCBOOT_H__
0025 #define __PPCBOOT_H__
0026
0027 /*
0028  * Board information passed to kernel from PPCBoot
0029  *
0030  * include/asm-ppc/ppcboot.h
0031  */
0032
0033 #include "types.h"
0034
0035 typedef struct bd_info {
0036     unsigned long   bi_memstart;    /* start of DRAM memory */
0037     unsigned long   bi_memsize; /* size  of DRAM memory in bytes */
0038     unsigned long   bi_flashstart;  /* start of FLASH memory */
0039     unsigned long   bi_flashsize;   /* size  of FLASH memory */
0040     unsigned long   bi_flashoffset; /* reserved area for startup monitor */
0041     unsigned long   bi_sramstart;   /* start of SRAM memory */
0042     unsigned long   bi_sramsize;    /* size  of SRAM memory */
0043 #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\
0044     defined(TARGET_83xx)
0045     unsigned long   bi_immr_base;   /* base of IMMR register */
0046 #endif
0047 #if defined(TARGET_PPC_MPC52xx)
0048     unsigned long   bi_mbar_base;   /* base of internal registers */
0049 #endif
0050     unsigned long   bi_bootflags;   /* boot / reboot flag (for LynxOS) */
0051     unsigned long   bi_ip_addr; /* IP Address */
0052     unsigned char   bi_enetaddr[6]; /* Ethernet address */
0053 #if defined(TARGET_HOTFOOT)
0054     /* second onboard ethernet port */
0055     unsigned char   bi_enet1addr[6];
0056 #define HAVE_ENET1ADDR
0057 #endif /* TARGET_HOOTFOOT */
0058     unsigned short  bi_ethspeed;    /* Ethernet speed in Mbps */
0059     unsigned long   bi_intfreq; /* Internal Freq, in MHz */
0060     unsigned long   bi_busfreq; /* Bus Freq, in MHz */
0061 #if defined(TARGET_CPM2)
0062     unsigned long   bi_cpmfreq; /* CPM_CLK Freq, in MHz */
0063     unsigned long   bi_brgfreq; /* BRG_CLK Freq, in MHz */
0064     unsigned long   bi_sccfreq; /* SCC_CLK Freq, in MHz */
0065     unsigned long   bi_vco;     /* VCO Out from PLL, in MHz */
0066 #endif
0067 #if defined(TARGET_PPC_MPC52xx)
0068     unsigned long   bi_ipbfreq;     /* IPB Bus Freq, in MHz */
0069     unsigned long   bi_pcifreq;     /* PCI Bus Freq, in MHz */
0070 #endif
0071     unsigned long   bi_baudrate;    /* Console Baudrate */
0072 #if defined(TARGET_4xx)
0073     unsigned char   bi_s_version[4];    /* Version of this structure */
0074     unsigned char   bi_r_version[32];   /* Version of the ROM (IBM) */
0075     unsigned int    bi_procfreq;    /* CPU (Internal) Freq, in Hz */
0076     unsigned int    bi_plb_busfreq; /* PLB Bus speed, in Hz */
0077     unsigned int    bi_pci_busfreq; /* PCI Bus speed, in Hz */
0078     unsigned char   bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
0079 #endif
0080 #if defined(TARGET_HOTFOOT)
0081     unsigned int     bi_pllouta_freq;       /* PLL OUTA speed, in Hz */
0082 #endif
0083 #if defined(TARGET_HYMOD)
0084     hymod_conf_t    bi_hymod_conf;  /* hymod configuration information */
0085 #endif
0086 #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
0087     defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
0088     /* second onboard ethernet port */
0089     unsigned char   bi_enet1addr[6];
0090 #define HAVE_ENET1ADDR
0091 #endif
0092 #if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
0093     defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
0094     /* third onboard ethernet ports */
0095     unsigned char   bi_enet2addr[6];
0096 #define HAVE_ENET2ADDR
0097 #endif
0098 #if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
0099     /* fourth onboard ethernet ports */
0100     unsigned char   bi_enet3addr[6];
0101 #define HAVE_ENET3ADDR
0102 #endif
0103 #if defined(TARGET_HOTFOOT)
0104         int             bi_phynum[2];           /* Determines phy mapping */
0105         int             bi_phymode[2];          /* Determines phy mode */
0106 #endif
0107 #if defined(TARGET_4xx)
0108     unsigned int    bi_opbfreq;     /* OB clock in Hz */
0109     int     bi_iic_fast[2];     /* Use fast i2c mode */
0110 #endif
0111 #if defined(TARGET_440GX)
0112     int     bi_phynum[4];       /* phy mapping */
0113     int     bi_phymode[4];      /* phy mode */
0114 #endif
0115 } bd_t;
0116
0117 #define bi_tbfreq   bi_intfreq
0118
0119 #endif  /* __PPCBOOT_H__ */