powerpc/boot/gamecube-head.S

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * arch/powerpc/boot/gamecube-head.S
0004  *
0005  * Nintendo GameCube bootwrapper entry.
0006  * Copyright (C) 2004-2009 The GameCube Linux Team
0007  * Copyright (C) 2008,2009 Albert Herranz
0008  */
0009
0010 #include "ppc_asm.h"
0011
0012 /*
0013  * The entry code does no assumptions regarding:
0014  * - if the data and instruction caches are enabled or not
0015  * - if the MMU is enabled or not
0016  *
0017  * We enable the caches if not already enabled, enable the MMU with an
0018  * identity mapping scheme and jump to the start code.
0019  */
0020
0021     .text
0022
0023     .globl _zimage_start
0024 _zimage_start:
0025
0026     /* turn the MMU off */
0027     mfmsr   9
0028     rlwinm  9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
0029     bcl 20, 31, 1f
0030 1:
0031     mflr    8
0032     clrlwi  8, 8, 3     /* convert to a real address */
0033     addi    8, 8, _mmu_off - 1b
0034     mtsrr0  8
0035     mtsrr1  9
0036     rfi
0037 _mmu_off:
0038     /* MMU disabled */
0039
0040     /* setup BATs */
0041     isync
0042     li      8, 0
0043     mtspr   0x210, 8    /* IBAT0U */
0044     mtspr   0x212, 8    /* IBAT1U */
0045     mtspr   0x214, 8    /* IBAT2U */
0046     mtspr   0x216, 8    /* IBAT3U */
0047     mtspr   0x218, 8    /* DBAT0U */
0048     mtspr   0x21a, 8    /* DBAT1U */
0049     mtspr   0x21c, 8    /* DBAT2U */
0050     mtspr   0x21e, 8    /* DBAT3U */
0051
0052     li  8, 0x01ff   /* first 16MiB */
0053     li  9, 0x0002   /* rw */
0054     mtspr   0x211, 9    /* IBAT0L */
0055     mtspr   0x210, 8    /* IBAT0U */
0056     mtspr   0x219, 9    /* DBAT0L */
0057     mtspr   0x218, 8    /* DBAT0U */
0058
0059     lis 8, 0x0c00   /* I/O mem */
0060     ori 8, 8, 0x3ff /* 32MiB */
0061     lis 9, 0x0c00
0062     ori 9, 9, 0x002a    /* uncached, guarded, rw */
0063     mtspr   0x21b, 9    /* DBAT1L */
0064     mtspr   0x21a, 8    /* DBAT1U */
0065
0066     lis 8, 0x0100   /* next 8MiB */
0067     ori 8, 8, 0x00ff    /* 8MiB */
0068     lis 9, 0x0100
0069     ori 9, 9, 0x0002    /* rw */
0070     mtspr   0x215, 9    /* IBAT2L */
0071     mtspr   0x214, 8    /* IBAT2U */
0072     mtspr   0x21d, 9    /* DBAT2L */
0073     mtspr   0x21c, 8    /* DBAT2U */
0074
0075     /* enable and invalidate the caches if not already enabled */
0076     mfspr   8, 0x3f0    /* HID0 */
0077     andi.   0, 8, (1<<15)       /* HID0_ICE */
0078     bne 1f
0079     ori 8, 8, (1<<15)|(1<<11)   /* HID0_ICE|HID0_ICFI*/
0080 1:
0081     andi.   0, 8, (1<<14)       /* HID0_DCE */
0082     bne 1f
0083     ori 8, 8, (1<<14)|(1<<10)   /* HID0_DCE|HID0_DCFI*/
0084 1:
0085     mtspr   0x3f0, 8    /* HID0 */
0086     isync
0087
0088     /* initialize arguments */
0089     li  3, 0
0090     li  4, 0
0091     li  5, 0
0092
0093     /* turn the MMU on */
0094     bcl 20, 31, 1f
0095 1:
0096     mflr    8
0097     addi    8, 8, _mmu_on - 1b
0098     mfmsr   9
0099     ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
0100     mtsrr0  8
0101     mtsrr1  9
0102     sync
0103     rfi
0104 _mmu_on:
0105     b _zimage_start_lib
0106