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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2007 David Gibson, IBM Corporation.
0004  *
0005  * Based on earlier code:
0006  *   Copyright (C) Paul Mackerras 1997.
0007  *
0008  *   Matt Porter <mporter@kernel.crashing.org>
0009  *   Copyright 2002-2005 MontaVista Software Inc.
0010  *
0011  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
0012  *   Copyright (c) 2003, 2004 Zultys Technologies
0013  */
0014 #include <stdarg.h>
0015 #include <stddef.h>
0016 #include "types.h"
0017 #include "elf.h"
0018 #include "string.h"
0019 #include "stdio.h"
0020 #include "page.h"
0021 #include "ops.h"
0022 #include "reg.h"
0023 #include "io.h"
0024 #include "dcr.h"
0025 #include "4xx.h"
0026 #include "44x.h"
0027 
0028 static u8 *ebony_mac0, *ebony_mac1;
0029 
0030 #define EBONY_FPGA_PATH     "/plb/opb/ebc/fpga"
0031 #define EBONY_FPGA_FLASH_SEL    0x01
0032 #define EBONY_SMALL_FLASH_PATH  "/plb/opb/ebc/small-flash"
0033 
0034 static void ebony_flashsel_fixup(void)
0035 {
0036     void *devp;
0037     u32 reg[3] = {0x0, 0x0, 0x80000};
0038     u8 *fpga;
0039     u8 fpga_reg0 = 0x0;
0040 
0041     devp = finddevice(EBONY_FPGA_PATH);
0042     if (!devp)
0043         fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
0044 
0045     if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
0046         fatal("%s has missing or invalid virtual-reg property\n\r",
0047               EBONY_FPGA_PATH);
0048 
0049     fpga_reg0 = in_8(fpga);
0050 
0051     devp = finddevice(EBONY_SMALL_FLASH_PATH);
0052     if (!devp)
0053         fatal("Couldn't locate small flash node %s\n\r",
0054               EBONY_SMALL_FLASH_PATH);
0055 
0056     if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
0057         fatal("%s has reg property of unexpected size\n\r",
0058               EBONY_SMALL_FLASH_PATH);
0059 
0060     /* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
0061     if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
0062         reg[1] ^= 0x80000;
0063 
0064     setprop(devp, "reg", reg, sizeof(reg));
0065 }
0066 
0067 static void ebony_fixups(void)
0068 {
0069     // FIXME: sysclk should be derived by reading the FPGA registers
0070     unsigned long sysclk = 33000000;
0071 
0072     ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
0073     ibm4xx_sdram_fixup_memsize();
0074     dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0);
0075     dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1);
0076     ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
0077     ebony_flashsel_fixup();
0078 }
0079 
0080 void ebony_init(void *mac0, void *mac1)
0081 {
0082     platform_ops.fixups = ebony_fixups;
0083     platform_ops.exit = ibm44x_dbcr_reset;
0084     ebony_mac0 = mac0;
0085     ebony_mac1 = mac1;
0086     fdt_init(_dtb_start);
0087     serial_console_init();
0088 }