0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
0004 * Based on TQM8548 device tree
0005 *
0006 * XPedite5200 PrPMC/XMC module based on MPC8548E. This dts is for the
0007 * xMon boot loader memory map which differs from U-Boot's.
0008 */
0009
0010 /dts-v1/;
0011
0012 / {
0013 model = "xes,xpedite5200";
0014 compatible = "xes,xpedite5200", "xes,MPC8548";
0015 #address-cells = <1>;
0016 #size-cells = <1>;
0017 form-factor = "PMC/XMC";
0018 boot-bank = <0x0>;
0019
0020 aliases {
0021 ethernet0 = &enet0;
0022 ethernet1 = &enet1;
0023 ethernet2 = &enet2;
0024 ethernet3 = &enet3;
0025
0026 serial0 = &serial0;
0027 serial1 = &serial1;
0028 pci0 = &pci0;
0029 pci1 = &pci1;
0030 };
0031
0032 cpus {
0033 #address-cells = <1>;
0034 #size-cells = <0>;
0035
0036 PowerPC,8548@0 {
0037 device_type = "cpu";
0038 reg = <0>;
0039 d-cache-line-size = <32>; // 32 bytes
0040 i-cache-line-size = <32>; // 32 bytes
0041 d-cache-size = <0x8000>; // L1, 32K
0042 i-cache-size = <0x8000>; // L1, 32K
0043 next-level-cache = <&L2>;
0044 };
0045 };
0046
0047 memory {
0048 device_type = "memory";
0049 reg = <0x0 0x0>; // Filled in by boot loader
0050 };
0051
0052 soc@ef000000 {
0053 #address-cells = <1>;
0054 #size-cells = <1>;
0055 device_type = "soc";
0056 ranges = <0x0 0xef000000 0x100000>;
0057 bus-frequency = <0>;
0058 compatible = "fsl,mpc8548-immr", "simple-bus";
0059
0060 ecm-law@0 {
0061 compatible = "fsl,ecm-law";
0062 reg = <0x0 0x1000>;
0063 fsl,num-laws = <12>;
0064 };
0065
0066 ecm@1000 {
0067 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
0068 reg = <0x1000 0x1000>;
0069 interrupts = <17 2>;
0070 interrupt-parent = <&mpic>;
0071 };
0072
0073 memory-controller@2000 {
0074 compatible = "fsl,mpc8548-memory-controller";
0075 reg = <0x2000 0x1000>;
0076 interrupt-parent = <&mpic>;
0077 interrupts = <18 2>;
0078 };
0079
0080 L2: l2-cache-controller@20000 {
0081 compatible = "fsl,mpc8548-l2-cache-controller";
0082 reg = <0x20000 0x1000>;
0083 cache-line-size = <32>; // 32 bytes
0084 cache-size = <0x80000>; // L2, 512K
0085 interrupt-parent = <&mpic>;
0086 interrupts = <16 2>;
0087 };
0088
0089 /* On-card I2C */
0090 i2c@3000 {
0091 #address-cells = <1>;
0092 #size-cells = <0>;
0093 cell-index = <0>;
0094 compatible = "fsl-i2c";
0095 reg = <0x3000 0x100>;
0096 interrupts = <43 2>;
0097 interrupt-parent = <&mpic>;
0098 dfsrr;
0099
0100 /*
0101 * Board GPIO:
0102 * 0: BRD_CFG0 (1: P14 IO present)
0103 * 1: BRD_CFG1 (1: FP ethernet present)
0104 * 2: BRD_CFG2 (1: XMC IO present)
0105 * 3: XMC root complex indicator
0106 * 4: Flash boot device indicator
0107 * 5: Flash write protect enable
0108 * 6: PMC monarch indicator
0109 * 7: PMC EREADY
0110 */
0111 gpio1: gpio@18 {
0112 compatible = "nxp,pca9556";
0113 reg = <0x18>;
0114 #gpio-cells = <2>;
0115 gpio-controller;
0116 polarity = <0x00>;
0117 };
0118
0119 /* P14 GPIO */
0120 gpio2: gpio@19 {
0121 compatible = "nxp,pca9556";
0122 reg = <0x19>;
0123 #gpio-cells = <2>;
0124 gpio-controller;
0125 polarity = <0x00>;
0126 };
0127
0128 eeprom@50 {
0129 compatible = "atmel,at24c16";
0130 reg = <0x50>;
0131 };
0132
0133 rtc@68 {
0134 compatible = "st,m41t00",
0135 "dallas,ds1338";
0136 reg = <0x68>;
0137 };
0138
0139 dtt@34 {
0140 compatible = "maxim,max1237";
0141 reg = <0x34>;
0142 };
0143 };
0144
0145 /* Off-card I2C */
0146 i2c@3100 {
0147 #address-cells = <1>;
0148 #size-cells = <0>;
0149 cell-index = <1>;
0150 compatible = "fsl-i2c";
0151 reg = <0x3100 0x100>;
0152 interrupts = <43 2>;
0153 interrupt-parent = <&mpic>;
0154 dfsrr;
0155 };
0156
0157 dma@21300 {
0158 #address-cells = <1>;
0159 #size-cells = <1>;
0160 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
0161 reg = <0x21300 0x4>;
0162 ranges = <0x0 0x21100 0x200>;
0163 cell-index = <0>;
0164 dma-channel@0 {
0165 compatible = "fsl,mpc8548-dma-channel",
0166 "fsl,eloplus-dma-channel";
0167 reg = <0x0 0x80>;
0168 cell-index = <0>;
0169 interrupt-parent = <&mpic>;
0170 interrupts = <20 2>;
0171 };
0172 dma-channel@80 {
0173 compatible = "fsl,mpc8548-dma-channel",
0174 "fsl,eloplus-dma-channel";
0175 reg = <0x80 0x80>;
0176 cell-index = <1>;
0177 interrupt-parent = <&mpic>;
0178 interrupts = <21 2>;
0179 };
0180 dma-channel@100 {
0181 compatible = "fsl,mpc8548-dma-channel",
0182 "fsl,eloplus-dma-channel";
0183 reg = <0x100 0x80>;
0184 cell-index = <2>;
0185 interrupt-parent = <&mpic>;
0186 interrupts = <22 2>;
0187 };
0188 dma-channel@180 {
0189 compatible = "fsl,mpc8548-dma-channel",
0190 "fsl,eloplus-dma-channel";
0191 reg = <0x180 0x80>;
0192 cell-index = <3>;
0193 interrupt-parent = <&mpic>;
0194 interrupts = <23 2>;
0195 };
0196 };
0197
0198 /* eTSEC1: Front panel port 0 */
0199 enet0: ethernet@24000 {
0200 #address-cells = <1>;
0201 #size-cells = <1>;
0202 cell-index = <0>;
0203 device_type = "network";
0204 model = "eTSEC";
0205 compatible = "gianfar";
0206 reg = <0x24000 0x1000>;
0207 ranges = <0x0 0x24000 0x1000>;
0208 local-mac-address = [ 00 00 00 00 00 00 ];
0209 interrupts = <29 2 30 2 34 2>;
0210 interrupt-parent = <&mpic>;
0211 tbi-handle = <&tbi0>;
0212 phy-handle = <&phy0>;
0213
0214 mdio@520 {
0215 #address-cells = <1>;
0216 #size-cells = <0>;
0217 compatible = "fsl,gianfar-mdio";
0218 reg = <0x520 0x20>;
0219
0220 phy0: ethernet-phy@1 {
0221 interrupt-parent = <&mpic>;
0222 interrupts = <8 1>;
0223 reg = <0x1>;
0224 };
0225 phy1: ethernet-phy@2 {
0226 interrupt-parent = <&mpic>;
0227 interrupts = <8 1>;
0228 reg = <0x2>;
0229 };
0230 phy2: ethernet-phy@3 {
0231 interrupt-parent = <&mpic>;
0232 interrupts = <8 1>;
0233 reg = <0x3>;
0234 };
0235 phy3: ethernet-phy@4 {
0236 interrupt-parent = <&mpic>;
0237 interrupts = <8 1>;
0238 reg = <0x4>;
0239 };
0240 tbi0: tbi-phy@11 {
0241 reg = <0x11>;
0242 device_type = "tbi-phy";
0243 };
0244 };
0245 };
0246
0247 /* eTSEC2: Front panel port 1 */
0248 enet1: ethernet@25000 {
0249 #address-cells = <1>;
0250 #size-cells = <1>;
0251 cell-index = <1>;
0252 device_type = "network";
0253 model = "eTSEC";
0254 compatible = "gianfar";
0255 reg = <0x25000 0x1000>;
0256 ranges = <0x0 0x25000 0x1000>;
0257 local-mac-address = [ 00 00 00 00 00 00 ];
0258 interrupts = <35 2 36 2 40 2>;
0259 interrupt-parent = <&mpic>;
0260 tbi-handle = <&tbi1>;
0261 phy-handle = <&phy1>;
0262
0263 mdio@520 {
0264 #address-cells = <1>;
0265 #size-cells = <0>;
0266 compatible = "fsl,gianfar-tbi";
0267 reg = <0x520 0x20>;
0268
0269 tbi1: tbi-phy@11 {
0270 reg = <0x11>;
0271 device_type = "tbi-phy";
0272 };
0273 };
0274 };
0275
0276 /* eTSEC3: Rear panel port 2 */
0277 enet2: ethernet@26000 {
0278 #address-cells = <1>;
0279 #size-cells = <1>;
0280 cell-index = <2>;
0281 device_type = "network";
0282 model = "eTSEC";
0283 compatible = "gianfar";
0284 reg = <0x26000 0x1000>;
0285 ranges = <0x0 0x26000 0x1000>;
0286 local-mac-address = [ 00 00 00 00 00 00 ];
0287 interrupts = <31 2 32 2 33 2>;
0288 interrupt-parent = <&mpic>;
0289 tbi-handle = <&tbi2>;
0290 phy-handle = <&phy2>;
0291
0292 mdio@520 {
0293 #address-cells = <1>;
0294 #size-cells = <0>;
0295 compatible = "fsl,gianfar-tbi";
0296 reg = <0x520 0x20>;
0297
0298 tbi2: tbi-phy@11 {
0299 reg = <0x11>;
0300 device_type = "tbi-phy";
0301 };
0302 };
0303 };
0304
0305 /* eTSEC4: Rear panel port 3 */
0306 enet3: ethernet@27000 {
0307 #address-cells = <1>;
0308 #size-cells = <1>;
0309 cell-index = <3>;
0310 device_type = "network";
0311 model = "eTSEC";
0312 compatible = "gianfar";
0313 reg = <0x27000 0x1000>;
0314 ranges = <0x0 0x27000 0x1000>;
0315 local-mac-address = [ 00 00 00 00 00 00 ];
0316 interrupts = <37 2 38 2 39 2>;
0317 interrupt-parent = <&mpic>;
0318 tbi-handle = <&tbi3>;
0319 phy-handle = <&phy3>;
0320
0321 mdio@520 {
0322 #address-cells = <1>;
0323 #size-cells = <0>;
0324 compatible = "fsl,gianfar-tbi";
0325 reg = <0x520 0x20>;
0326
0327 tbi3: tbi-phy@11 {
0328 reg = <0x11>;
0329 device_type = "tbi-phy";
0330 };
0331 };
0332 };
0333
0334 serial0: serial@4500 {
0335 cell-index = <0>;
0336 device_type = "serial";
0337 compatible = "fsl,ns16550", "ns16550";
0338 reg = <0x4500 0x100>;
0339 clock-frequency = <0>;
0340 current-speed = <9600>;
0341 interrupts = <42 2>;
0342 interrupt-parent = <&mpic>;
0343 };
0344
0345 serial1: serial@4600 {
0346 cell-index = <1>;
0347 device_type = "serial";
0348 compatible = "fsl,ns16550", "ns16550";
0349 reg = <0x4600 0x100>;
0350 clock-frequency = <0>;
0351 current-speed = <9600>;
0352 interrupts = <42 2>;
0353 interrupt-parent = <&mpic>;
0354 };
0355
0356 global-utilities@e0000 { // global utilities reg
0357 compatible = "fsl,mpc8548-guts";
0358 reg = <0xe0000 0x1000>;
0359 fsl,has-rstcr;
0360 };
0361
0362 mpic: pic@40000 {
0363 interrupt-controller;
0364 #address-cells = <0>;
0365 #interrupt-cells = <2>;
0366 reg = <0x40000 0x40000>;
0367 compatible = "chrp,open-pic";
0368 device_type = "open-pic";
0369 };
0370 };
0371
0372 localbus@ef005000 {
0373 compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
0374 "simple-bus";
0375 #address-cells = <2>;
0376 #size-cells = <1>;
0377 reg = <0xef005000 0x100>; // BRx, ORx, etc.
0378 interrupt-parent = <&mpic>;
0379 interrupts = <19 2>;
0380
0381 ranges = <
0382 0 0x0 0xf8000000 0x08000000 // NOR boot flash
0383 1 0x0 0xf0000000 0x08000000 // NOR expansion flash
0384 2 0x0 0xe8000000 0x00010000 // NAND CE1
0385 3 0x0 0xe8010000 0x00010000 // NAND CE2
0386 >;
0387
0388 nor-boot@0,0 {
0389 #address-cells = <1>;
0390 #size-cells = <1>;
0391 compatible = "cfi-flash";
0392 reg = <0 0x0 0x4000000>;
0393 bank-width = <2>;
0394
0395 partition@0 {
0396 label = "Primary OS";
0397 reg = <0x00000000 0x180000>;
0398 };
0399 partition@180000 {
0400 label = "Secondary OS";
0401 reg = <0x00180000 0x180000>;
0402 };
0403 partition@300000 {
0404 label = "User";
0405 reg = <0x00300000 0x3c80000>;
0406 };
0407 partition@3f80000 {
0408 label = "Boot firmware";
0409 reg = <0x03f80000 0x80000>;
0410 };
0411 };
0412
0413 nor-alternate@1,0 {
0414 #address-cells = <1>;
0415 #size-cells = <1>;
0416 compatible = "cfi-flash";
0417 reg = <1 0x0 0x4000000>;
0418 bank-width = <2>;
0419
0420 partition@0 {
0421 label = "Filesystem";
0422 reg = <0x00000000 0x3f80000>;
0423 };
0424 partition@3f80000 {
0425 label = "Alternate boot firmware";
0426 reg = <0x03f80000 0x80000>;
0427 };
0428 };
0429
0430 nand@2,0 {
0431 #address-cells = <1>;
0432 #size-cells = <1>;
0433 compatible = "xes,address-ctl-nand";
0434 reg = <2 0x0 0x10000>;
0435 cle-line = <0x8>; /* CLE tied to A3 */
0436 ale-line = <0x10>; /* ALE tied to A4 */
0437
0438 partition@0 {
0439 label = "NAND Filesystem";
0440 reg = <0 0x40000000>;
0441 };
0442 };
0443 };
0444
0445 /* PMC interface */
0446 pci0: pci@ef008000 {
0447 #interrupt-cells = <1>;
0448 #size-cells = <2>;
0449 #address-cells = <3>;
0450 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0451 device_type = "pci";
0452 reg = <0xef008000 0x1000>;
0453 clock-frequency = <33333333>;
0454 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0455 interrupt-map = <
0456 /* IDSEL */
0457 0xe000 0 0 1 &mpic 2 1
0458 0xe000 0 0 2 &mpic 3 1>;
0459
0460 interrupt-parent = <&mpic>;
0461 interrupts = <24 2>;
0462 bus-range = <0 0>;
0463 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
0464 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
0465 };
0466
0467 /* XMC PCIe */
0468 pci1: pcie@ef00a000 {
0469 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0470 interrupt-map = <
0471 /* IDSEL 0x0 */
0472 0x00000 0 0 1 &mpic 0 1
0473 0x00000 0 0 2 &mpic 1 1
0474 0x00000 0 0 3 &mpic 2 1
0475 0x00000 0 0 4 &mpic 3 1>;
0476
0477 interrupt-parent = <&mpic>;
0478 interrupts = <26 2>;
0479 bus-range = <0 0xff>;
0480 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
0481 0x01000000 0 0x00000000 0xd1000000 0 0x01000000>;
0482 clock-frequency = <33333333>;
0483 #interrupt-cells = <1>;
0484 #size-cells = <2>;
0485 #address-cells = <3>;
0486 reg = <0xef00a000 0x1000>;
0487 compatible = "fsl,mpc8548-pcie";
0488 device_type = "pci";
0489 pcie@0 {
0490 reg = <0 0 0 0 0>;
0491 #size-cells = <2>;
0492 #address-cells = <3>;
0493 device_type = "pci";
0494 ranges = <0x02000000 0 0xc0000000 0x02000000 0
0495 0xc0000000 0 0x20000000
0496 0x01000000 0 0x00000000 0x01000000 0
0497 0x00000000 0 0x08000000>;
0498 };
0499 };
0500
0501 /* Needed for dtbImage boot wrapper compatibility */
0502 chosen {
0503 stdout-path = &serial0;
0504 };
0505 };
