0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
0004 * Based on TQM8548 device tree
0005 *
0006 * XPedite5200 PrPMC/XMC module based on MPC8548E
0007 */
0008
0009 /dts-v1/;
0010
0011 / {
0012 model = "xes,xpedite5200";
0013 compatible = "xes,xpedite5200", "xes,MPC8548";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 aliases {
0018 ethernet0 = &enet0;
0019 ethernet1 = &enet1;
0020 ethernet2 = &enet2;
0021 ethernet3 = &enet3;
0022
0023 serial0 = &serial0;
0024 serial1 = &serial1;
0025 pci0 = &pci0;
0026 };
0027
0028 cpus {
0029 #address-cells = <1>;
0030 #size-cells = <0>;
0031
0032 PowerPC,8548@0 {
0033 device_type = "cpu";
0034 reg = <0>;
0035 d-cache-line-size = <32>; // 32 bytes
0036 i-cache-line-size = <32>; // 32 bytes
0037 d-cache-size = <0x8000>; // L1, 32K
0038 i-cache-size = <0x8000>; // L1, 32K
0039 next-level-cache = <&L2>;
0040 };
0041 };
0042
0043 memory {
0044 device_type = "memory";
0045 reg = <0x0 0x0>; // Filled in by U-Boot
0046 };
0047
0048 soc@ef000000 {
0049 #address-cells = <1>;
0050 #size-cells = <1>;
0051 device_type = "soc";
0052 ranges = <0x0 0xef000000 0x100000>;
0053 bus-frequency = <0>;
0054 compatible = "fsl,mpc8548-immr", "simple-bus";
0055
0056 ecm-law@0 {
0057 compatible = "fsl,ecm-law";
0058 reg = <0x0 0x1000>;
0059 fsl,num-laws = <12>;
0060 };
0061
0062 ecm@1000 {
0063 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
0064 reg = <0x1000 0x1000>;
0065 interrupts = <17 2>;
0066 interrupt-parent = <&mpic>;
0067 };
0068
0069 memory-controller@2000 {
0070 compatible = "fsl,mpc8548-memory-controller";
0071 reg = <0x2000 0x1000>;
0072 interrupt-parent = <&mpic>;
0073 interrupts = <18 2>;
0074 };
0075
0076 L2: l2-cache-controller@20000 {
0077 compatible = "fsl,mpc8548-l2-cache-controller";
0078 reg = <0x20000 0x1000>;
0079 cache-line-size = <32>; // 32 bytes
0080 cache-size = <0x80000>; // L2, 512K
0081 interrupt-parent = <&mpic>;
0082 interrupts = <16 2>;
0083 };
0084
0085 /* On-card I2C */
0086 i2c@3000 {
0087 #address-cells = <1>;
0088 #size-cells = <0>;
0089 cell-index = <0>;
0090 compatible = "fsl-i2c";
0091 reg = <0x3000 0x100>;
0092 interrupts = <43 2>;
0093 interrupt-parent = <&mpic>;
0094 dfsrr;
0095
0096 /*
0097 * Board GPIO:
0098 * 0: BRD_CFG0 (1: P14 IO present)
0099 * 1: BRD_CFG1 (1: FP ethernet present)
0100 * 2: BRD_CFG2 (1: XMC IO present)
0101 * 3: XMC root complex indicator
0102 * 4: Flash boot device indicator
0103 * 5: Flash write protect enable
0104 * 6: PMC monarch indicator
0105 * 7: PMC EREADY
0106 */
0107 gpio1: gpio@18 {
0108 compatible = "nxp,pca9556";
0109 reg = <0x18>;
0110 #gpio-cells = <2>;
0111 gpio-controller;
0112 polarity = <0x00>;
0113 };
0114
0115 /* P14 GPIO */
0116 gpio2: gpio@19 {
0117 compatible = "nxp,pca9556";
0118 reg = <0x19>;
0119 #gpio-cells = <2>;
0120 gpio-controller;
0121 polarity = <0x00>;
0122 };
0123
0124 eeprom@50 {
0125 compatible = "atmel,at24c16";
0126 reg = <0x50>;
0127 };
0128
0129 rtc@68 {
0130 compatible = "st,m41t00",
0131 "dallas,ds1338";
0132 reg = <0x68>;
0133 };
0134
0135 dtt@34 {
0136 compatible = "maxim,max1237";
0137 reg = <0x34>;
0138 };
0139 };
0140
0141 /* Off-card I2C */
0142 i2c@3100 {
0143 #address-cells = <1>;
0144 #size-cells = <0>;
0145 cell-index = <1>;
0146 compatible = "fsl-i2c";
0147 reg = <0x3100 0x100>;
0148 interrupts = <43 2>;
0149 interrupt-parent = <&mpic>;
0150 dfsrr;
0151 };
0152
0153 dma@21300 {
0154 #address-cells = <1>;
0155 #size-cells = <1>;
0156 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
0157 reg = <0x21300 0x4>;
0158 ranges = <0x0 0x21100 0x200>;
0159 cell-index = <0>;
0160 dma-channel@0 {
0161 compatible = "fsl,mpc8548-dma-channel",
0162 "fsl,eloplus-dma-channel";
0163 reg = <0x0 0x80>;
0164 cell-index = <0>;
0165 interrupt-parent = <&mpic>;
0166 interrupts = <20 2>;
0167 };
0168 dma-channel@80 {
0169 compatible = "fsl,mpc8548-dma-channel",
0170 "fsl,eloplus-dma-channel";
0171 reg = <0x80 0x80>;
0172 cell-index = <1>;
0173 interrupt-parent = <&mpic>;
0174 interrupts = <21 2>;
0175 };
0176 dma-channel@100 {
0177 compatible = "fsl,mpc8548-dma-channel",
0178 "fsl,eloplus-dma-channel";
0179 reg = <0x100 0x80>;
0180 cell-index = <2>;
0181 interrupt-parent = <&mpic>;
0182 interrupts = <22 2>;
0183 };
0184 dma-channel@180 {
0185 compatible = "fsl,mpc8548-dma-channel",
0186 "fsl,eloplus-dma-channel";
0187 reg = <0x180 0x80>;
0188 cell-index = <3>;
0189 interrupt-parent = <&mpic>;
0190 interrupts = <23 2>;
0191 };
0192 };
0193
0194 /* eTSEC1: Front panel port 0 */
0195 enet0: ethernet@24000 {
0196 #address-cells = <1>;
0197 #size-cells = <1>;
0198 cell-index = <0>;
0199 device_type = "network";
0200 model = "eTSEC";
0201 compatible = "gianfar";
0202 reg = <0x24000 0x1000>;
0203 ranges = <0x0 0x24000 0x1000>;
0204 local-mac-address = [ 00 00 00 00 00 00 ];
0205 interrupts = <29 2 30 2 34 2>;
0206 interrupt-parent = <&mpic>;
0207 tbi-handle = <&tbi0>;
0208 phy-handle = <&phy0>;
0209
0210 mdio@520 {
0211 #address-cells = <1>;
0212 #size-cells = <0>;
0213 compatible = "fsl,gianfar-mdio";
0214 reg = <0x520 0x20>;
0215
0216 phy0: ethernet-phy@1 {
0217 interrupt-parent = <&mpic>;
0218 interrupts = <8 1>;
0219 reg = <0x1>;
0220 };
0221 phy1: ethernet-phy@2 {
0222 interrupt-parent = <&mpic>;
0223 interrupts = <8 1>;
0224 reg = <0x2>;
0225 };
0226 phy2: ethernet-phy@3 {
0227 interrupt-parent = <&mpic>;
0228 interrupts = <8 1>;
0229 reg = <0x3>;
0230 };
0231 phy3: ethernet-phy@4 {
0232 interrupt-parent = <&mpic>;
0233 interrupts = <8 1>;
0234 reg = <0x4>;
0235 };
0236 tbi0: tbi-phy@11 {
0237 reg = <0x11>;
0238 device_type = "tbi-phy";
0239 };
0240 };
0241 };
0242
0243 /* eTSEC2: Front panel port 1 */
0244 enet1: ethernet@25000 {
0245 #address-cells = <1>;
0246 #size-cells = <1>;
0247 cell-index = <1>;
0248 device_type = "network";
0249 model = "eTSEC";
0250 compatible = "gianfar";
0251 reg = <0x25000 0x1000>;
0252 ranges = <0x0 0x25000 0x1000>;
0253 local-mac-address = [ 00 00 00 00 00 00 ];
0254 interrupts = <35 2 36 2 40 2>;
0255 interrupt-parent = <&mpic>;
0256 tbi-handle = <&tbi1>;
0257 phy-handle = <&phy1>;
0258
0259 mdio@520 {
0260 #address-cells = <1>;
0261 #size-cells = <0>;
0262 compatible = "fsl,gianfar-tbi";
0263 reg = <0x520 0x20>;
0264
0265 tbi1: tbi-phy@11 {
0266 reg = <0x11>;
0267 device_type = "tbi-phy";
0268 };
0269 };
0270 };
0271
0272 /* eTSEC3: Rear panel port 2 */
0273 enet2: ethernet@26000 {
0274 #address-cells = <1>;
0275 #size-cells = <1>;
0276 cell-index = <2>;
0277 device_type = "network";
0278 model = "eTSEC";
0279 compatible = "gianfar";
0280 reg = <0x26000 0x1000>;
0281 ranges = <0x0 0x26000 0x1000>;
0282 local-mac-address = [ 00 00 00 00 00 00 ];
0283 interrupts = <31 2 32 2 33 2>;
0284 interrupt-parent = <&mpic>;
0285 tbi-handle = <&tbi2>;
0286 phy-handle = <&phy2>;
0287
0288 mdio@520 {
0289 #address-cells = <1>;
0290 #size-cells = <0>;
0291 compatible = "fsl,gianfar-tbi";
0292 reg = <0x520 0x20>;
0293
0294 tbi2: tbi-phy@11 {
0295 reg = <0x11>;
0296 device_type = "tbi-phy";
0297 };
0298 };
0299 };
0300
0301 /* eTSEC4: Rear panel port 3 */
0302 enet3: ethernet@27000 {
0303 #address-cells = <1>;
0304 #size-cells = <1>;
0305 cell-index = <3>;
0306 device_type = "network";
0307 model = "eTSEC";
0308 compatible = "gianfar";
0309 reg = <0x27000 0x1000>;
0310 ranges = <0x0 0x27000 0x1000>;
0311 local-mac-address = [ 00 00 00 00 00 00 ];
0312 interrupts = <37 2 38 2 39 2>;
0313 interrupt-parent = <&mpic>;
0314 tbi-handle = <&tbi3>;
0315 phy-handle = <&phy3>;
0316
0317 mdio@520 {
0318 #address-cells = <1>;
0319 #size-cells = <0>;
0320 compatible = "fsl,gianfar-tbi";
0321 reg = <0x520 0x20>;
0322
0323 tbi3: tbi-phy@11 {
0324 reg = <0x11>;
0325 device_type = "tbi-phy";
0326 };
0327 };
0328 };
0329
0330 serial0: serial@4500 {
0331 cell-index = <0>;
0332 device_type = "serial";
0333 compatible = "fsl,ns16550", "ns16550";
0334 reg = <0x4500 0x100>;
0335 clock-frequency = <0>;
0336 current-speed = <115200>;
0337 interrupts = <42 2>;
0338 interrupt-parent = <&mpic>;
0339 };
0340
0341 serial1: serial@4600 {
0342 cell-index = <1>;
0343 device_type = "serial";
0344 compatible = "fsl,ns16550", "ns16550";
0345 reg = <0x4600 0x100>;
0346 clock-frequency = <0>;
0347 current-speed = <115200>;
0348 interrupts = <42 2>;
0349 interrupt-parent = <&mpic>;
0350 };
0351
0352 global-utilities@e0000 { // global utilities reg
0353 compatible = "fsl,mpc8548-guts";
0354 reg = <0xe0000 0x1000>;
0355 fsl,has-rstcr;
0356 };
0357
0358 mpic: pic@40000 {
0359 interrupt-controller;
0360 #address-cells = <0>;
0361 #interrupt-cells = <2>;
0362 reg = <0x40000 0x40000>;
0363 compatible = "chrp,open-pic";
0364 device_type = "open-pic";
0365 };
0366 };
0367
0368 localbus@ef005000 {
0369 compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
0370 "simple-bus";
0371 #address-cells = <2>;
0372 #size-cells = <1>;
0373 reg = <0xef005000 0x100>; // BRx, ORx, etc.
0374 interrupt-parent = <&mpic>;
0375 interrupts = <19 2>;
0376
0377 ranges = <
0378 0 0x0 0xfc000000 0x04000000 // NOR boot flash
0379 1 0x0 0xf8000000 0x04000000 // NOR expansion flash
0380 2 0x0 0xef800000 0x00010000 // NAND CE1
0381 3 0x0 0xef840000 0x00010000 // NAND CE2
0382 >;
0383
0384 nor-boot@0,0 {
0385 #address-cells = <1>;
0386 #size-cells = <1>;
0387 compatible = "cfi-flash";
0388 reg = <0 0x0 0x4000000>;
0389 bank-width = <2>;
0390
0391 partition@0 {
0392 label = "Primary OS";
0393 reg = <0x00000000 0x180000>;
0394 };
0395 partition@180000 {
0396 label = "Secondary OS";
0397 reg = <0x00180000 0x180000>;
0398 };
0399 partition@300000 {
0400 label = "User";
0401 reg = <0x00300000 0x3c80000>;
0402 };
0403 partition@3f80000 {
0404 label = "Boot firmware";
0405 reg = <0x03f80000 0x80000>;
0406 };
0407 };
0408
0409 nor-alternate@1,0 {
0410 #address-cells = <1>;
0411 #size-cells = <1>;
0412 compatible = "cfi-flash";
0413 reg = <1 0x0 0x4000000>;
0414 bank-width = <2>;
0415
0416 partition@0 {
0417 label = "Filesystem";
0418 reg = <0x00000000 0x3f80000>;
0419 };
0420 partition@3f80000 {
0421 label = "Alternate boot firmware";
0422 reg = <0x03f80000 0x80000>;
0423 };
0424 };
0425
0426 nand@2,0 {
0427 #address-cells = <1>;
0428 #size-cells = <1>;
0429 compatible = "xes,address-ctl-nand";
0430 reg = <2 0x0 0x10000>;
0431 cle-line = <0x8>; /* CLE tied to A3 */
0432 ale-line = <0x10>; /* ALE tied to A4 */
0433
0434 /* U-Boot should fix this up */
0435 partition@0 {
0436 label = "NAND Filesystem";
0437 reg = <0 0x40000000>;
0438 };
0439 };
0440 };
0441
0442 /* PMC interface */
0443 pci0: pci@ef008000 {
0444 #interrupt-cells = <1>;
0445 #size-cells = <2>;
0446 #address-cells = <3>;
0447 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0448 device_type = "pci";
0449 reg = <0xef008000 0x1000>;
0450 clock-frequency = <33333333>;
0451 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0452 interrupt-map = <
0453 /* IDSEL */
0454 0xe000 0 0 1 &mpic 2 1
0455 0xe000 0 0 2 &mpic 3 1>;
0456
0457 interrupt-parent = <&mpic>;
0458 interrupts = <24 2>;
0459 bus-range = <0 0>;
0460 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x40000000
0461 0x01000000 0 0x00000000 0xe8000000 0 0x00800000>;
0462 };
0463
0464 /* XMC PCIe is not yet enabled in U-Boot on XPedite5200 */
0465 };
