0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * TQM 8560 Device Tree Source
0004 *
0005 * Copyright 2008 Freescale Semiconductor Inc.
0006 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
0007 */
0008
0009 /dts-v1/;
0010
0011 / {
0012 model = "tqc,tqm8560";
0013 compatible = "tqc,tqm8560";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 aliases {
0018 ethernet0 = &enet0;
0019 ethernet1 = &enet1;
0020 ethernet2 = &enet2;
0021 serial0 = &serial0;
0022 serial1 = &serial1;
0023 pci0 = &pci0;
0024 };
0025
0026 cpus {
0027 #address-cells = <1>;
0028 #size-cells = <0>;
0029
0030 PowerPC,8560@0 {
0031 device_type = "cpu";
0032 reg = <0>;
0033 d-cache-line-size = <32>;
0034 i-cache-line-size = <32>;
0035 d-cache-size = <32768>;
0036 i-cache-size = <32768>;
0037 timebase-frequency = <0>;
0038 bus-frequency = <0>;
0039 clock-frequency = <0>;
0040 next-level-cache = <&L2>;
0041 };
0042 };
0043
0044 memory {
0045 device_type = "memory";
0046 reg = <0x00000000 0x10000000>;
0047 };
0048
0049 soc@e0000000 {
0050 #address-cells = <1>;
0051 #size-cells = <1>;
0052 device_type = "soc";
0053 ranges = <0x0 0xe0000000 0x100000>;
0054 bus-frequency = <0>;
0055 compatible = "fsl,mpc8560-immr", "simple-bus";
0056
0057 ecm-law@0 {
0058 compatible = "fsl,ecm-law";
0059 reg = <0x0 0x1000>;
0060 fsl,num-laws = <8>;
0061 };
0062
0063 ecm@1000 {
0064 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
0065 reg = <0x1000 0x1000>;
0066 interrupts = <17 2>;
0067 interrupt-parent = <&mpic>;
0068 };
0069
0070 memory-controller@2000 {
0071 compatible = "fsl,mpc8540-memory-controller";
0072 reg = <0x2000 0x1000>;
0073 interrupt-parent = <&mpic>;
0074 interrupts = <18 2>;
0075 };
0076
0077 L2: l2-cache-controller@20000 {
0078 compatible = "fsl,mpc8540-l2-cache-controller";
0079 reg = <0x20000 0x1000>;
0080 cache-line-size = <32>;
0081 cache-size = <0x40000>; // L2, 256K
0082 interrupt-parent = <&mpic>;
0083 interrupts = <16 2>;
0084 };
0085
0086 i2c@3000 {
0087 #address-cells = <1>;
0088 #size-cells = <0>;
0089 cell-index = <0>;
0090 compatible = "fsl-i2c";
0091 reg = <0x3000 0x100>;
0092 interrupts = <43 2>;
0093 interrupt-parent = <&mpic>;
0094 dfsrr;
0095
0096 dtt@48 {
0097 compatible = "national,lm75";
0098 reg = <0x48>;
0099 };
0100
0101 rtc@68 {
0102 compatible = "dallas,ds1337";
0103 reg = <0x68>;
0104 };
0105 };
0106
0107 dma@21300 {
0108 #address-cells = <1>;
0109 #size-cells = <1>;
0110 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
0111 reg = <0x21300 0x4>;
0112 ranges = <0x0 0x21100 0x200>;
0113 cell-index = <0>;
0114 dma-channel@0 {
0115 compatible = "fsl,mpc8560-dma-channel",
0116 "fsl,eloplus-dma-channel";
0117 reg = <0x0 0x80>;
0118 cell-index = <0>;
0119 interrupt-parent = <&mpic>;
0120 interrupts = <20 2>;
0121 };
0122 dma-channel@80 {
0123 compatible = "fsl,mpc8560-dma-channel",
0124 "fsl,eloplus-dma-channel";
0125 reg = <0x80 0x80>;
0126 cell-index = <1>;
0127 interrupt-parent = <&mpic>;
0128 interrupts = <21 2>;
0129 };
0130 dma-channel@100 {
0131 compatible = "fsl,mpc8560-dma-channel",
0132 "fsl,eloplus-dma-channel";
0133 reg = <0x100 0x80>;
0134 cell-index = <2>;
0135 interrupt-parent = <&mpic>;
0136 interrupts = <22 2>;
0137 };
0138 dma-channel@180 {
0139 compatible = "fsl,mpc8560-dma-channel",
0140 "fsl,eloplus-dma-channel";
0141 reg = <0x180 0x80>;
0142 cell-index = <3>;
0143 interrupt-parent = <&mpic>;
0144 interrupts = <23 2>;
0145 };
0146 };
0147
0148 enet0: ethernet@24000 {
0149 #address-cells = <1>;
0150 #size-cells = <1>;
0151 cell-index = <0>;
0152 device_type = "network";
0153 model = "TSEC";
0154 compatible = "gianfar";
0155 reg = <0x24000 0x1000>;
0156 ranges = <0x0 0x24000 0x1000>;
0157 local-mac-address = [ 00 00 00 00 00 00 ];
0158 interrupts = <29 2 30 2 34 2>;
0159 interrupt-parent = <&mpic>;
0160 tbi-handle = <&tbi0>;
0161 phy-handle = <&phy2>;
0162
0163 mdio@520 {
0164 #address-cells = <1>;
0165 #size-cells = <0>;
0166 compatible = "fsl,gianfar-mdio";
0167 reg = <0x520 0x20>;
0168
0169 phy1: ethernet-phy@1 {
0170 interrupt-parent = <&mpic>;
0171 interrupts = <8 1>;
0172 reg = <1>;
0173 };
0174 phy2: ethernet-phy@2 {
0175 interrupt-parent = <&mpic>;
0176 interrupts = <8 1>;
0177 reg = <2>;
0178 };
0179 phy3: ethernet-phy@3 {
0180 interrupt-parent = <&mpic>;
0181 interrupts = <8 1>;
0182 reg = <3>;
0183 };
0184 tbi0: tbi-phy@11 {
0185 reg = <0x11>;
0186 device_type = "tbi-phy";
0187 };
0188 };
0189 };
0190
0191 enet1: ethernet@25000 {
0192 #address-cells = <1>;
0193 #size-cells = <1>;
0194 cell-index = <1>;
0195 device_type = "network";
0196 model = "TSEC";
0197 compatible = "gianfar";
0198 reg = <0x25000 0x1000>;
0199 ranges = <0x0 0x25000 0x1000>;
0200 local-mac-address = [ 00 00 00 00 00 00 ];
0201 interrupts = <35 2 36 2 40 2>;
0202 interrupt-parent = <&mpic>;
0203 tbi-handle = <&tbi1>;
0204 phy-handle = <&phy1>;
0205
0206 mdio@520 {
0207 #address-cells = <1>;
0208 #size-cells = <0>;
0209 compatible = "fsl,gianfar-tbi";
0210 reg = <0x520 0x20>;
0211
0212 tbi1: tbi-phy@11 {
0213 reg = <0x11>;
0214 device_type = "tbi-phy";
0215 };
0216 };
0217 };
0218
0219 mpic: pic@40000 {
0220 interrupt-controller;
0221 #address-cells = <0>;
0222 #interrupt-cells = <2>;
0223 reg = <0x40000 0x40000>;
0224 device_type = "open-pic";
0225 compatible = "chrp,open-pic";
0226 };
0227
0228 cpm@919c0 {
0229 #address-cells = <1>;
0230 #size-cells = <1>;
0231 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
0232 reg = <0x919c0 0x30>;
0233 ranges;
0234
0235 muram@80000 {
0236 #address-cells = <1>;
0237 #size-cells = <1>;
0238 ranges = <0 0x80000 0x10000>;
0239
0240 data@0 {
0241 compatible = "fsl,cpm-muram-data";
0242 reg = <0 0x4000 0x9000 0x2000>;
0243 };
0244 };
0245
0246 brg@919f0 {
0247 compatible = "fsl,mpc8560-brg",
0248 "fsl,cpm2-brg",
0249 "fsl,cpm-brg";
0250 reg = <0x919f0 0x10 0x915f0 0x10>;
0251 clock-frequency = <0>;
0252 };
0253
0254 cpmpic: pic@90c00 {
0255 interrupt-controller;
0256 #address-cells = <0>;
0257 #interrupt-cells = <2>;
0258 interrupts = <46 2>;
0259 interrupt-parent = <&mpic>;
0260 reg = <0x90c00 0x80>;
0261 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
0262 };
0263
0264 serial0: serial@91a00 {
0265 device_type = "serial";
0266 compatible = "fsl,mpc8560-scc-uart",
0267 "fsl,cpm2-scc-uart";
0268 reg = <0x91a00 0x20 0x88000 0x100>;
0269 fsl,cpm-brg = <1>;
0270 fsl,cpm-command = <0x800000>;
0271 current-speed = <115200>;
0272 interrupts = <40 8>;
0273 interrupt-parent = <&cpmpic>;
0274 };
0275
0276 serial1: serial@91a20 {
0277 device_type = "serial";
0278 compatible = "fsl,mpc8560-scc-uart",
0279 "fsl,cpm2-scc-uart";
0280 reg = <0x91a20 0x20 0x88100 0x100>;
0281 fsl,cpm-brg = <2>;
0282 fsl,cpm-command = <0x4a00000>;
0283 current-speed = <115200>;
0284 interrupts = <41 8>;
0285 interrupt-parent = <&cpmpic>;
0286 };
0287
0288 enet2: ethernet@91340 {
0289 device_type = "network";
0290 compatible = "fsl,mpc8560-fcc-enet",
0291 "fsl,cpm2-fcc-enet";
0292 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
0293 local-mac-address = [ 00 00 00 00 00 00 ];
0294 fsl,cpm-command = <0x1a400300>;
0295 interrupts = <34 8>;
0296 interrupt-parent = <&cpmpic>;
0297 phy-handle = <&phy3>;
0298 };
0299 };
0300 };
0301
0302 localbus@e0005000 {
0303 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
0304 "simple-bus";
0305 #address-cells = <2>;
0306 #size-cells = <1>;
0307 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
0308 interrupt-parent = <&mpic>;
0309 interrupts = <19 2>;
0310
0311 ranges = <
0312 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
0313 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
0314 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
0315 >;
0316
0317 flash@1,0 {
0318 #address-cells = <1>;
0319 #size-cells = <1>;
0320 compatible = "cfi-flash";
0321 reg = <1 0x0 0x8000000>;
0322 bank-width = <4>;
0323 device-width = <1>;
0324
0325 partition@0 {
0326 label = "kernel";
0327 reg = <0x00000000 0x00200000>;
0328 };
0329 partition@200000 {
0330 label = "root";
0331 reg = <0x00200000 0x00300000>;
0332 };
0333 partition@500000 {
0334 label = "user";
0335 reg = <0x00500000 0x07a00000>;
0336 };
0337 partition@7f00000 {
0338 label = "env1";
0339 reg = <0x07f00000 0x00040000>;
0340 };
0341 partition@7f40000 {
0342 label = "env2";
0343 reg = <0x07f40000 0x00040000>;
0344 };
0345 partition@7f80000 {
0346 label = "u-boot";
0347 reg = <0x07f80000 0x00080000>;
0348 read-only;
0349 };
0350 };
0351
0352 /* Note: CAN support needs be enabled in U-Boot */
0353 can0@2,0 {
0354 compatible = "intel,82527"; // Bosch CC770
0355 reg = <2 0x0 0x100>;
0356 interrupts = <4 1>;
0357 interrupt-parent = <&mpic>;
0358 };
0359
0360 can1@2,100 {
0361 compatible = "intel,82527"; // Bosch CC770
0362 reg = <2 0x100 0x100>;
0363 interrupts = <4 1>;
0364 interrupt-parent = <&mpic>;
0365 };
0366 };
0367
0368 pci0: pci@e0008000 {
0369 #interrupt-cells = <1>;
0370 #size-cells = <2>;
0371 #address-cells = <3>;
0372 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0373 device_type = "pci";
0374 reg = <0xe0008000 0x1000>;
0375 clock-frequency = <66666666>;
0376 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0377 interrupt-map = <
0378 /* IDSEL 28 */
0379 0xe000 0 0 1 &mpic 2 1
0380 0xe000 0 0 2 &mpic 3 1
0381 0xe000 0 0 3 &mpic 6 1
0382 0xe000 0 0 4 &mpic 5 1
0383
0384 /* IDSEL 11 */
0385 0x5800 0 0 1 &mpic 6 1
0386 0x5800 0 0 2 &mpic 5 1
0387 >;
0388
0389 interrupt-parent = <&mpic>;
0390 interrupts = <24 2>;
0391 bus-range = <0 0>;
0392 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
0393 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
0394 };
0395 };
